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TPS717 Datasheet(PDF) 4 Page - Texas Instruments

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Part # TPS717
Description  TPS717xx Low-Noise, High-Bandwidth PSRR,Low-Dropout, 150-mA Linear Regulator
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS717 Datasheet(HTML) 4 Page - Texas Instruments

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TPS717
SBVS068H – FEBRUARY 2006 – REVISED JANUARY 2015
www.ti.com
6 Specifications
6.1 Absolute Maximum Ratings
over operating temperature range (unless otherwise noted), all voltages are with respect to GND
(1)
MIN
MAX
UNIT
VIN
–0.3
7
V
VFB
–0.3
3.6
V
Voltage
VNR
–0.3
3.6
V
VEN
–0.3
VIN + 0.3 V
(2)
V
VOUT
–0.3
7
V
Current
IOUT
Internally limited
A
Continuous total power dissipation
PDISS
See Thermal Information
Operating junction temperature
TJ
–55
150
°C
Storage temperature
Tstg
–55
150
°C
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
VEN absolute maximum rating is VIN + 0.3 V or 7 V, whichever is greater.
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all
±2000
pins(1)
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per JEDEC specification JESD22-
±500
C101, all pins(2)
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating junction temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage
2.5
6.5
V
VOUT
Output voltage
0.9
5
V
IOUT
Output current
0
150
mA
VEN
Enable voltage
0
VIN
V
COUT
Output capacitor
1
100
µF
TJ
Junction temperature
–40
125
°C
6.4 Thermal Information
TPS717xx
THERMAL METRIC(1)
DCK
DRV
DSE
UNIT
5 PINS
6 PINS
6 PINS
RθJA
Junction-to-ambient thermal resistance
279.2
71.1
190.5
RθJC(top)
Junction-to-case (top) thermal resistance
57.5
96.5
94.9
RθJB
Junction-to-board thermal resistance
74.1
40.5
149.3
°C/W
ψJT
Junction-to-top characterization parameter
0.8
2.7
6.4
ψJB
Junction-to-board characterization parameter
73.1
40.9
152.8
RθJC(bot)
Junction-to-case (bottom) thermal resistance
n/a
10.7
n/a
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
4
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