IEEE 802.3af Power-Over-Ethernet

Interface/PWM Controller for Power Devices

_______________________________________________________________________________________

5

1V

≅

=

1V

Figure 1. Effective Differential Input Resistance/Offset Current

ELECTRICAL CHARACTERISTICS (PWM Controller) (continued)

Note 1:

All min/max limits for the PD interface are production tested at +85°C (extended grade)/+70°C (commercial grade). Limits

at +25°C and -40°C are guaranteed by design. All PWM controller min/max limits are 100% production tested at +25°C

and +85°C (extended grade)/+70°C (commercial grade). Limits at -40°C are guaranteed by design, unless otherwise

noted.

Note 2:

The input offset current is illustrated in Figure 1.

Note 3:

resistance.

Note 4:

Classification current is turned off whenever the IC is in power mode.

Note 5:

Note 6:

See Thermal Dissipation section for details.

Note 7:

When UVLO is connected to the midpoint of an external resistor-divider with a series resistance of 25.5k

Ω (±1%), the turn-

on threshold set point for the power mode is defined by the external resistor-divider. Make sure the voltage on the UVLO

Note 8:

Note 9:

MAX5942A/MAX5942B to exit power-on mode (as long as the input voltage remains above an operable voltage level of 12V).

Note 11: Guaranteed by design.

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

SOFT-START

SS Source Current

2.0

4.5

6.5

µA

SS Sink Current

1mA

Peak Soft-Start Voltage Clamp

No external load

2.331

2.420

2.500

V

0.25

0.37

0.41

Shutdown Threshold

0.53

0.59

0.65

V