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TPS3106-EP Datasheet(PDF) 6 Page - Texas Instruments |
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TPS3106-EP Datasheet(HTML) 6 Page - Texas Instruments |
6 / 23 page www.ti.com TIMING REQUIREMENTS FUNCTIONAL BLOCK DIAGRAMS _ + _ + ResetLogic andTimer V IT- 0.551V V DD MR PFI GND RESET PFO TPS3103 Production Data TPS3103xxx-EP TPS3106xxx-EP TPS3110xxx-EP SLVS686 – OCTOBER 2006 SWITCHING CHARACTERISTICS (continued) R L = 1 MΩ, CL = 50 pF, and TA = –55°C to 125°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Propagation delay time, MR to RESET, VDD ≥ 1.1 × VIT, VIL = 0.3 × VDD, VIH = 0.7 × tPHL high_to_low-level RSTVDD, 1 5 µs VDD output RSTSENSE delay R L = 1 MΩ, CL = 50 pF, and TA = –55°C to 125°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tT(OUT) Time-out period at WDI VDD ≥ 0.85 V 0.55 1.1 1.65 s at VDD VIH = 1.1 × VIT, VIL = 0.9 × VIT–, VIT– = 0.86 V 20 at MR VDD ≥ VIT + 0.2 V, VIL = 0.3 × VDD, VIH = 0.7 × VDD 0.1 tW Pulse width at SENSE VDD ≥ VIT, VIH = 1.1 × VIT – (S), VIL = 0.9 × VIT – (S) 20 µs at PFI VDD ≥ 0.85 V, VIH = 1.1 × VIT – (S), VIL = 0.9 × VIT – (S) 20 at WDI VDD ≥ VIT, VIL = 0.3 × VDD, VIH = 0.7 × VDD 0.3 6 Submit Documentation Feedback |
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