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LMP8278 Datasheet(PDF) 4 Page - Texas Instruments

Part # LMP8278
Description  LMP8278Q High Common Mode, 14 x Gain, Precision Current Sensing Amplifier
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
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LMP8278 Datasheet(HTML) 4 Page - Texas Instruments

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LMP8278
SNAS575A – FEBRUARY 2012 – REVISED MARCH 2013
www.ti.com
5.0V Electrical Characteristics
(1)
Unless otherwise specified, all limits ensured at TA = 25°C, VS = 5.0V, GND = 0V, −2V ≤ VCM ≤ 28V, and RL = ∞, 10nF
between VS and GND. Boldface limits apply at the temperature extremes.
PARAMETER
TEST CONDITIONS
MIN(2)
TYP(3)
MAX(2)
UNIT
Overall Performance (From –IN (pin 1) and +IN (pin 8) to OUT (pin 5) with pins A1 (pin 3) and A2 (pin 4) connected)
IS
Supply Current
0.3
0.4
0.55
mA
AV
Total Gain
–2V < VCM < 28V
13.93
14
14.07
V/V
–2V < VCM < 40V
13.86
14
14.14
Gain Drift
−40°C ≤ TA ≤ 125°C
±2
±25
ppm/°C
SR
Slew Rate
VIN = ±0.2V
0.7
V/
μs
BW
Bandwidth
90
kHz
VOS
Input Offset Voltage
VCM = VS / 2
±0.25
±2
mV
TCVOS
Input Offset Voltage Drift (4)
−40°C ≤ TA ≤ 125°C
±2.5
±15
μV/°C
en
Input Referred Voltage Noise
0.1 Hz
− 10 Hz, 6–Sigma
11
μVPP
Spectral Density, 1 kHz
285
nV/
√Hz
PSRR
Power Supply Rejection Ratio
DC,4.5V
≤ VS ≤ 5.5V, VCM = VS/2
70
80
dB
Preamplifier (From input pins –IN (pin 1) and +IN (pin 8) to A1 (pin 3))
RCM
Input Impedance Common Mode
−2V ≤ VCM ≤ 40
100
125
k
RDM
Input Impedance Differential Mode (5)
−2V ≤ VCM ≤ 40
60
85
k
VOS
Input Offset Voltage
VCM = VS / 2
±0.25
±2
mV
TCVOS
Input Offset Voltage Drift (4)
−40°C ≤ TA ≤ 125°C
±2.5
±15
μV/°C
DC CMRR
DC Common Mode Rejection Ratio
−2V ≤ VCM ≤ 40V
80
90
dB
AC CMRR
AC Common Mode Rejection Ratio
f = 1 kHz
90
dB
f = 10 kHz
85
CMVR
Input Common Mode Voltage Range
for 80 dB CMRR
−2
40
V
A1V
Gain
6.93
7.0
7.07
V/V
RF-INT
Output Impedance Filter Resistor
97
100
103
k
TCRF-INT
Output Impedance Filter Resistor Drift
20
±100
ppm/°C
A1 VOUT
Preamplifier Output Voltage Swing
VOL
RL = ∞
4
10
mV
VOH
4.80
4.95
V
Output Buffer (From A2 (pin 4) to OUT (pin 5))
VOS
Input Offset Voltage
0V
≤ VCM ≤ VS–1
±0.25
±2
mV
A2V
Gain
1.98
2
2.02
V/V
IB
Input Bias Current of Output Buffer(6)(5)
±20
pA
±20
nA
A2 VOUT
Output Buffer Output Voltage Swing (7)(8)
VOL
RL = 100 kΩ
7
20
mV
VOH
4.80
4.99
V
A2 VOUT
Output Buffer Output Voltage Swing (7)(8)
VOL
RL = 10 kΩ
15
30
mV
VOH
4.75
4.95
V
(1)
The Electrical Characteristics table lists ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
(2)
Datasheet min/max specification limits are ensured by test, unless otherwise noted.
(3)
Typical values represent the most likely parameter norms at TA = +25°C and at the Recommended Operation Conditions at the time of
product characterization and are not ensured.
(4)
Offset voltage drift determined by dividing the change in VOS at temperature extremes by the total temperature change.
(5)
Specification is ensured by design and is not tested in production.
(6)
Positive current corresponds to current flowing into the device.
(7)
For this test input is driven from A1 stage.
(8)
For VOL, RL is connected to VS and for VOH, RL is connected to GND.
4
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