TLV320ADC3101-Q1_15 datasheet(2/86 Pages) TI

Part #	TLV320ADC3101-Q1

Description	Low-Power Stereo ADC With Embedded miniDSP for Wireless Handsets and Portable Audio

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Manufacturer	TI [Texas Instruments]

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DINL

DINR

DVDD

DVSS

IOVDD

AVDD

AVSS

MCLK

SCL

SDA

RESET

MICBIAS2

MICBIAS1

TLV320ADC3101-Q1

SLAS816B – MARCH 2012 – REVISED AUGUST 2012

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DESCRIPTION (CONTINUED)

A programmable integrated PLL is included for flexible clock generation and provides support for all standard

audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular

cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

SIMPLIFIED BLOCK DIAGRAM

Figure 1. TLV320ADC3101-Q1 Block Diagram

2

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