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BUK9K45-100E Datasheet(PDF) 1 Page - NXP Semiconductors |
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BUK9K45-100E Datasheet(HTML) 1 Page - NXP Semiconductors |
1 / 13 page BUK9K45-100E Dual N-channel TrenchMOS logic level FET 26 March 2013 Product data sheet Scan or click this QR code to view the latest information for this product 1. General description Dual logic level N-channel MOSFET in a LFPAK56D package using TrenchMOS technology. This product has been designed and qualified to AEC Q101 standard for use in high performance automotive applications. 2. Features and benefits • Q101 compliant • Repetitive avalanche rated • Suitable for thermally demanding environments due to 175 °C rating • True logic level gate with VGS(th) > 0.5 V @ 175 °C 3. Applications • 12 V Automotive systems • Motors, lamps and solenoid control • Start-stop micro-hybrid applications • Transmission control • Ultra high performance power switching 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 100 V ID drain current VGS = 5 V; Tmb = 25 °C; Fig. 1 - - 21 A Ptot total power dissipation Tmb = 25 °C; Fig. 2 - - 53 W Static characteristics FET1 and FET2 RDSon drain-source on-state resistance VGS = 5 V; ID = 5 A; Tj = 25 °C; Fig. 12 - 38.3 45 mΩ Dynamic characteristics FET1 and FET2 QGD gate-drain charge ID = 5 A; VDS = 80 V; VGS = 10 V; Tj = 25 °C; Fig. 15; Fig. 14 - 7.3 - nC |
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