10

FN9095.2

May 7, 2008

The ISL6228 monitors the OCSET pin and the VO pin

voltages. Once the OCSET pin voltage is higher than the VO

pin voltage for more than 10µs, the ISL6228 declares an OCP

Where:

overcurrent setpoint

OCP circuit

- DCR is the inductor DC resistance

to sense the inductor current. To sense the inductor current

correctly not only in DC operation, but also during dynamic

needs to match the inductor time constant L/DCR. The value

For example, if L is 1.5µH, DCR is 4.5m

9k

To prevent false OCP, a 10µA current source flows out of the

VO pin during start up, generating a voltage drop on resistor

PGOOD pin goes high, the VO pin current source will

terminate.

When an OCP fault is declared, the PGOOD pin will pull

down to 30

Ω and latch off the converter. The fault will remain

latched until the EN pin has been pulled below the falling EN

Overvoltage Protection

The OVP fault detection circuit triggers after the FB pin voltage

2µs. The FB pin voltage is 0.6V in normal operation. The rising

the FB pin voltage is above 116% x 0.6V = 0.696V, for more

than 2µs, an OVP fault is declared.

When an OVP fault is declared, the PGOOD pin will pull

down to 60

Ω and latch-off the converter. The OVP fault will

remain latched until the EN pin has been pulled below the

Although the converter has latched-off in response to an

OVP fault, the LGATE gate-driver output will retain the ability

to toggle the low-side MOSFET on and off, in response to

thresholds. The LGATE gate-driver will turn on the low-side

MOSFET to discharge the output voltage, protecting the

load. The LGATE gate-driver will turn off the low-side

MOSFET once the FB pin voltage is lower than the falling

the FB pin voltage falls below 106% x 0.6V = 0.636V, for

more than 2µs, the LGATE gate-driver will turn off the low-

side MOSFET. If the output voltage rises again, the LGATE

driver will again turn on the low-side MOSFET when the FB

for more than 2µs. By doing so, the ISL6228 protects the

load when there is a consistent overvoltage condition.

Undervoltage Protection

The UVP fault detection circuit triggers after the FB pin

than 2µs. The FB pin voltage is 0.6V in normal operation.

means if the FB pin voltage is below 86% x 0.6V = 0.516V,

for more than 2µs, an UVP fault is declared, and the

PGOOD pin will pull down to 95

Ω and latch-off the converter.

The fault will remain latched until the EN pin has been pulled

decayed below the falling POR threshold voltage

V

Programming the Output Voltage

When the converter is in regulation there will be 0.6V from

the FB pin to the GND pin. Connect a two-resistor voltage

divider across the VO pin and the GND pin with the output

node connected to the FB pin. Scale the voltage-divider

network such that the FB pin is 0.6V with respect to the GND

pin when the converter is regulating at the desired output

voltage. The output voltage can be programmed from 0.6V

to 5V.

Programming the output voltage is written as Equation 8:

Where:

- The voltage to which the converter regulates the FB pin

from the FB pin to the converter output. In addition to

setting the output voltage, this resistor is part of the loop

compensation network

connects from the FB pin to the GND pin

to Equation 9:

(EQ. 6)

R

OCSET

I

•

10

μA

---------------------------

=

(EQ. 7)

C

SEN

L

R

•

-----------------------------------------

=

V

REF

V

O

R

BOTTOM

R

TOP

R

BOTTOM

+

---------------------------------------------------

•

=

(EQ. 8)

R

BOTTOM

V

•

TOP

V

O

V

REF

–

-----------------------------------

=

(EQ. 9)

ISL6228