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ISL55110EVAL1Z Datasheet(PDF) 5 Page - Intersil Corporation

Part # ISL55110EVAL1Z
Description  Dual, High Speed MOSFET Driver
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL55110EVAL1Z Datasheet(HTML) 5 Page - Intersil Corporation

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ISL55110, ISL55111
5
FN6228.8
January 29, 2015
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SUPPLY CURRENTS
IDD
Logic Supply Quiescent Current
PD = Low
4.0
6.0
mA
IDD-PDN
Logic Supply Power-down Current
PD = High
12
µA
IH
Driver Supply Quiescent Current
PD = Low, outputs unloaded
15
µA
IH_PDN
Driver Supply Power-down Current
PD = High
2.5
µA
DC Electrical Specifications VH = +12V, VDD = 2.7V to 5.5V, TA = +25°C, unless otherwise specified. (Continued)
PARAMETER
DESCRIPTION
TEST CONDITIONS
MIN
(Note 8)TYP
MAX
(Note 8)UNITS
AC Electrical Specifications VH = +12V, VDD = +3.6V, TA = +25°C, unless otherwise specified.
PARAMETER
DESCRIPTION
TEST CONDITIONS
MIN
(Note 8)TYP
MAX
(Note 8)UNITS
SWITCHING CHARACTERISTICS
tR
Driver Rise Time
Figure 2, OA, OB:
CL = 100pF/1k
10% to 90%, VOH - VOL = 12V
1.2
ns
tF
Driver Fall Time
Figure 2, OA, OB:
CL = 100pF/1k
10% to 90%, VOH - VOL = 12V
1.4
ns
tR
Driver Rise Time
Figure 2, OA, OB: CL = 1nF
10% to 90%, VOH - VOL = 12V
6.2
ns
tF
Driver Fall Time
Figure 2, OA, OB: CL = 1nF
10% to 90%, VOH - VOL = 12V
6.9
ns
tpdR
Input to Output Propagation Delay
Figure 3, load 100pF/1k
10.9
ns
tpdF
Input to Output Propagation Delay
10.7
ns
tpdR
Input to Output Propagation Delay
Figure 3, load 330pF
12.8
ns
tpdF
Input to Output Propagation Delay
12.5
ns
tpdR
Input to Output Propagation Delay
Figure 3, load 680pF
14.5
ns
tpdF
Input to Output Propagation Delay
14.1
ns
tSkewR
Channel-to-Channel tpdR Spread with Same
Loads Both Channels
Figure 3, All loads
<0.5
ns
tSkewF
Channel-to-Channel tpdF Spread with Same
Loads Both Channels
Figure 3, All loads
<0.5
ns
FMAX
Maximum Operating Frequency
70
MHz
TMIN
Minimum Pulse Width
6
ns
PDEN
Power-down to Power-on Time
650
ns
PDDIS
Power-on to Power-down Time
40
ns
tEN
Enable time; ENABLE switched high to low.
40
ns
tDIS
Disable time; ENABLE switched low to high.
40
ns
NOTE:
8. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.


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