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X9271UV14IZ Datasheet(PDF) 4 Page - Intersil Corporation |
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X9271UV14IZ Datasheet(HTML) 4 Page - Intersil Corporation |
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4 / 18 page  4 FN8174.4 July 18, 2014 Submit Document Feedback Pin Descriptions Bus Interface Pins SERIAL OUTPUT (SO) The Serial Output (SO) is the serial data output pin. During a read cycle, data is shifted out on this pin. Data is clocked out by the falling edge of the serial clock. SERIAL INPUT (SI) The Serial Input (SI) is the serial data input pin. All operational codes, byte addresses, and data to be written to the potentiometers and potentiometer registers are input on this pin. Data is latched by the rising edge of the serial clock. SERIAL CLOCK (SCK) The Serial Clock (SCK) input is used to clock data into and out of the X9271. HOLD (HOLD) HOLD is used in conjunction with the CS pin to select the device. Once the part is selected and a serial sequence is under way, HOLD may be used to pause the serial communication with the controller without resetting the serial sequence. To pause, HOLD must be brought LOW while SCK is LOW. To resume communication, HOLD is brought HIGH, again while SCK is LOW. If the pause feature is not used, HOLD should be held HIGH at all times. CMOS level input. DEVICE ADDRESS (A1 - A0) The Device Address (A1 - A0) inputs are used to set the 8-bit slave address. A match in the slave address serial data stream must be made with the address input in order to initiate communication with the X9271. CHIP SELECT (CS) When Chip Select (CS) is HIGH, the X9271 is deselected, the SO pin is at high impedance and (unless an internal write cycle is under way) the device is in standby state. CS LOW enables the X9271, placing it in the active power mode. It should be noted that after a power-up, a HIGH to LOW transition on CS is required prior to the start of any operation. Potentiometer Pins RH, RL The RH and RL pins are equivalent to the terminal connections on a mechanical potentiometer. RW The wiper pin (RW) is equivalent to the wiper terminal of a mechanical potentiometer. Supply Pins SYSTEM SUPPLY VOLTAGE (VCC) AND SUPPLY GROUND (VSS) The System Supply Voltage (VCC) pin is the system supply voltage. The Supply Ground (VSS) pin is the system ground. Other Pins HARDWARE WRITE PROTECT INPUT (WP) The Hardware Write Protect Input (WP) pin, when LOW, prevents nonvolatile writes to the data registers. NO CONNECT No Connect pins should be left floating. These pins are used for Intersil manufacturing and testing purposes. Principles of Operation Device Description SERIAL INTERFACE The X9271 supports the SPI interface hardware conventions. The device is accessed via the SI input with data clocked in on the rising SCK. CS must be LOW and the HOLD and WP pins must be HIGH during the entire operation. The SO and SI pins can be connected together, since they have three-state outputs. This can help to reduce system pin count. ARRAY DESCRIPTION The X9271 is composed of a resistor array (Figure 1). The array contains the equivalent of 255 discrete resistive segments that are connected in series. The physical ends of each array are equivalent to the fixed terminals of a mechanical potentiometer (RH and RL inputs). At both ends of each array and between each resistor segment is a CMOS switch connected to the wiper (RW) output. Within each individual array, only one switch may be turned on at a time. These switches are controlled by a Wiper Counter Register (WCR). The eight bits of the WCR (WCR[7:0]) are decoded to select, and enable, one of 256 switches (Table 1). POWER-UP AND POWER-DOWN RECOMMENDATIONS There are no restrictions on the power-up or power-down conditions of VCC and the voltages applied to the potentiometer pins, provided that VCC is always more positive than or equal to VH, VL, and VW; i.e., VCC VH, VL, VW. The VCC ramp rate specification is always in effect. X9271 |
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