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TLV320AIC3263 Datasheet(PDF) 9 Page - Texas Instruments |
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TLV320AIC3263 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 63 page  TLV320AIC3263 www.ti.com SLAS923 – JUNE 2013 Electrical Characteristics Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) VALUE UNIT AVDD1_18, AVDD2_18, AVDD4_18, AVDD_18 to AVSS1, AVSS2, AVSS4, AVSS respectively(2) –0.3 to 2.2 V RECVDD_33 to RECVSS –0.3 to 3.9 V DVDD to DVSS –0.3 to 2.2 V IOVDDx to IOVSS –0.3 to 3.9 V HVDD_18 to AVSS –0.3 to 2.2 V CPVDD_18 to CPVSS –0.3 to 2.2 V SVDD to SVSS, SPK_V to SVSS, and MICBIAS_VDD to AVSS3(3) –0.3 to 6.0 V Digital Input voltage to ground IOVSS – 0.3 to IOVDDx + V 0.3 Analog input voltage to ground AVSS – 0.3 to AVDDx_18 V + 0.3 VBAT –0.3 to 6 V Operating temperature range –40 to 85 °C Storage temperature range –55 to 125 °C Junction temperature (TJ Max) 105 °C Power dissipation (TJ Max – TA)/ θJA W θJA Junction-to-ambient thermal resistance 39.1 °C/W θJCtop Junction-to-case (top) thermal resistance 0.1 WCSP-81 (DSBGA) package (YZF) θJB Junction-to-board thermal resistance 12.0 PsiJT Junction-to-top characterization parameter 0.7 PsiJB Junction-to-board characterization parameter 11.5 (1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) It's recommended to keep all AVDDx_18 supplies within ± 50 mV of each other. (3) It's recommended to keep SVDD and SPK_V supplies within ± 50 mV of each other. Recommended Operating Conditions MIN NOM MAX UNIT AVDD1_18, Power Supply Voltage Range Referenced to AVSS1, AVSS2, AVSS4, AVSS 1.5(2) 1.8 1.95 V AVDD2_18, respectively(1) It is recommended to connect each AVDD4_18, of these supplies to a single supply rail. AVDD_18 RECVDD_33 Referenced to RECVSS 1.65(3) 3.3 3.6 IOVDD1, Referenced to IOVSS(1) 1.1 3.6 IOVDD2, IOVDD3 DVDD(4) Power Supply Voltage Range Referenced to DVSS(1) 1.26 1.8 1.95 CPVDD_18 Power Supply Voltage Range Referenced to CPVSS (1) 1.26 1.8 1.95 V HVDD_18 Referenced to AVSS(1) Ground-centered 1.5(3) 1.8 1.95 Configuration Unipolar 1.65(3) 1.95 Configuration (1) All grounds on board are tied together, so they should not differ in voltage by more than 0.1V max, for any combination of ground signals. AVDDx_18 are within +/- 0.05 V of each other. SVDD and SPK_V are within +/- 0.05 V of each other. (2) For optimal performance with CM=0.9V, min AVDD = 1.8V. (3) Minimum voltage for HVDD_18 should be greater than or equal to AVDD2_18. (4) At DVDD values lower than 1.65V, the PLL and SAR ADC do not function. Please see table in SLAU475, Maximum TLV320AIC3263 Clock Frequencies for details on maximum clock frequencies. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: TLV320AIC3263 |
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