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BUK9518-55A Datasheet(PDF) 3 Page - NXP Semiconductors |
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BUK9518-55A Datasheet(HTML) 3 Page - NXP Semiconductors |
3 / 14 page BUK9518-55A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 02 — 17 February 2011 3 of 14 NXP Semiconductors BUK9518-55A N-channel TrenchMOS logic level FET 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 55 V VDGR drain-gate voltage RGS =20kΩ -55 V VGS gate-source voltage -15 15 V ID drain current Tmb =25°C; VGS =5V; see Figure 1; see Figure 3 -61 A Tmb = 100 °C; VGS =5V; see Figure 1 -43 A IDM peak drain current Tmb = 25 °C; pulsed; tp ≤ 10 µs; see Figure 3 - 246 A Ptot total power dissipation Tmb =25°C; see Figure 2 - 136 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Source-drain diode IS source current Tmb =25°C - 61 A ISM peak source current pulsed; tp ≤ 10 µs; Tmb = 25 °C - 246 A Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID =61A; Vsup ≤ 55 V; RGS =50 Ω; VGS =5V; Tj(init) = 25 °C; unclamped - 127 mJ Fig 1. Normalized continuous drain current as a function of mounting base temperature Fig 2. Normalized total power dissipation as a function of mounting base temperature 03nf37 0 20 40 60 80 25 50 75 100 125 150 175 200 Tmb (°C) ID (A) Tmb (°C) 0 200 150 50 100 03na19 40 80 120 Pder (%) 0 |
Similar Part No. - BUK9518-55A_15 |
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Similar Description - BUK9518-55A_15 |
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