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SY89824L Datasheet(HTML) 1 Page - Micrel Semiconductor

Part No. SY89824L
Description  3.3V 1:22 HIGH-PERFORMANCE, LOW VOLTAGE BUS CLOCK DRIVER
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Maker  MICREL [Micrel Semiconductor]
Homepage  http://www.micrel.com
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SY89824L Datasheet(HTML) 1 Page - Micrel Semiconductor

   
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Pin
Function
HSTL_CLK, /HSTL_CLK
Differential HSTL Inputs
LVPECL_CLK, /LVPECL_CLK
Differential LVPECL Inputs
CLK_SEL
Input CLK Select (LVTTL)
OE
Output Enable (LVTTL)
Q0-Q21, /Q0-/Q21
Differential HSTL Outputs
GND
Ground
VCCI
VCC Core
VCCO
VCC Output
FEATURES
s 3.3V core supply, 1.8V output supply for reduced
power
s LVPECL and HSTL inputs
s 22 differential HSTL (low-voltage swing) output pairs
s HSTL outputs drive 50
to ground with no offset
voltage
s Low part-to-part skew (200ps max.)
s Low pin-to-pin skew (50ps max.)
s Available in a 64-Pin EPAD HQFP
The SY89824L is a High Performance Bus Clock Driver
with 22 differential HSTL (High Speed Transceiver Logic)
output pairs. The part is designed for use in low voltage
(3.3V/1.8V) applications which require a large number of
outputs to drive precisely aligned, ultra low skew signals to
their destination. The input is multiplexed from either HSTL
or LVPECL (Low Voltage Positive Emitter Coupled Logic)
by the CLK_SEL pin. The Output Enable (OE) is
synchronous so that the outputs will only be enabled/
disabled when they are already in the LOW state. This
avoids any chance of generating a runt clock pulse when
the device is enabled/disabled as can happen with an
asynchronous control.
The SY89824L features low pin-to-pin skew (50ps max.)
and low part-to-part skew (200ps max.)—performance
previously unachievable in a standard product having such
a high number of outputs. The SY89824L is available in a
single space saving package, enabling a lower overall cost
solution.
PIN CONFIGURATION
3.3V 1:22 HIGH-PERFORMANCE,
LOW VOLTAGE
BUS CLOCK DRIVER
DESCRIPTION
ClockWorks™
SY89824L
PIN NAMES
LOGIC SYMBOL
APPLICATIONS
s High-performance PCs
s Workstations
s Parallel processor-based systems
s Other high-performance computing
s Communications
1
64-PIN
HQFP
2
3
4
5
6
7
8
9
10
11
12
13
17 18 19 20 21 22 23 24 25 26 27 28 29
48
47
46
45
44
43
42
41
40
39
38
37
36
61 60 59 58 57 56 55 54 53 52 51 50 49
VCCO
NC
NC
HSTL_CLK
CLK_SEL
LVPECL_CLK
GND
OE
NC
NC
VCCI
14
15
16
35
34
33
62
63
64
30 31 32
HSTL_CLK
LVPECL_CLK
Q21
Q21
VCCO
Q8
Q8
Q7
Q7
VCCO
Q10
Q10
Q9
Q9
Q12
Q12
Q11
Q11
Q13
Q13
VCCO
1
CLK_SEL
HSTL_CLK
HSTL_CLK
LVPECL_CLK
LVPECL_CLK
OE
0
1
22
22
Q0 - Q21
Q0 - Q21
LEN
D
Q
Rev.: C
Amendment: /1
Issue Date:
March 2000


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