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TLE4242EJ Datasheet(PDF) 6 Page - Infineon Technologies AG |
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TLE4242EJ Datasheet(HTML) 6 Page - Infineon Technologies AG |
6 / 17 page Data Sheet 6 Revision1.0 2015-03-13 Infineon® LITIX™ Linear TLE4242EJ General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Table 4-1 Absolute Maximum Ratings1) Tj = -40°C to +150°C; all voltages with respect to ground, positive current flowing into pin for input pins, positive currents flowing out of pin for output pins (unless otherwise specified) 1) Not subject to production test, specified by design. Parameter Symbol Values Unit Note or Test Condition Number Min. Typ. Max. Voltages Input voltage VI -42 – 45 V – P_4.1.1 Output voltage VQ -1 – 40 V – P_4.1.2 Status output voltage VST -0.3 – 40 V – P_4.1.3 Status delay voltage VD -0.3 – 7 V – P_4.1.4 Reference input voltage VREF -1 – 16 V – P_4.1.5 PWM input voltage VPWM -40 – 40 V – P_4.1.6 Currents Input current II – – – A internally limited P_4.1.7 Output current IQ – – – A internally limited P_4.1.8 Status output current IST -5 – 5 mA – P_4.1.9 Status delay current ID -1 – 1 mA in off-state 10 min P_4.1.17 Reference input current IREF -2 – 2 mA – P_4.1.10 PWM input current IPWM -1 – 1 mA – P_4.1.11 Temperatures Junction Temperature Tj -40 – 150 °C – P_4.1.12 Storage Temperature Tstg -55 – 150 °C – P_4.1.13 ESD Susceptibility ESD Susceptibility VESD -2 – 2 kV HBM2) 2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5k Ω, 100 pF) P_4.1.14 ESD Susceptibility VESD -500 – 500 V CDM3) 3) ESD susceptibility, Charged Device Model “CDM” ESDA STM5.3.1 or ANSI/ESD S.5.3.1 P_4.1.15 ESD Susceptibility Pin 1, 4, 5, 8 (corner pins) to GND VESD1,4,5,8 -750 – 750 V CDM3) P_4.1.16 |
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