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TLS205B0EJV33 Datasheet(PDF) 6 Page - Infineon Technologies AG |
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TLS205B0EJV33 Datasheet(HTML) 6 Page - Infineon Technologies AG |
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6 / 31 page  Data Sheet 6 Rev. 1.2, 2015-01-15 TLS205B0 Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol Function 1 (DSO-8 EP) 1,2 (TSON-10) Q Output. Supplies power to the load. For this pin a minimum output capacitor of 3.3 µF is required to prevent oscillations. Larger output capacitors may be required for applications with large transient loads in order to limit peak voltage transients or when the regulator is applied in conjunction with a bypass capacitor. For more details please refer to “Application Information” on Page 24. 2 (DSO-8 EP) 4 (TSON-10) SENSE (fix voltage version) Output Sense. For the fixed voltage version the SENSE pin is the input to the error amplifier. This allows to achieve an optimized regulation performance in case of small voltage drops R p that occur between regulator and load. In applications where such drops are relevant they can be eliminated by connecting the SENSE pin directly at the load. In standard configuration the SENSE pin can be directly connected to Q. For further details please refer to the section “Kelvin Sense Connection” on Page 25. 2 (DSO-8 EP) 4 (TSON-10) ADJ (adjustable version) Adjust. For the adjustable version the ADJ pin is the input to the error amplifier. The ADJ pin voltage is 1.22 V referenced to ground and allows a output voltage range from 1.22 V to 20 V- V DR. The ADJ pin is internally clamped to ±7 V. Please note that the bias current of the ADJ pin is flowing into the pin. Its typical value of 60 nA shows a good stability with temperature. For further details please refer to Typical Performance Graph “Adjust Pin Bias Current versus Junction Temperature TJ” on Page 20. 3, 7 (DSO-8 EP) 3, 8 (TSON-10) NC No Connect. The NC Pins have no connection to any internal circuitry. Connect either to GND or leave open. 4 (DSO-8 EP) 5 (TSON-10) BYP Bypass. The BYP pin is used to bypass the reference of the TLS205B0 to achieve low noise performance. The BYP-pin is clamped internally to ±0.6 V (i.e. one V BE). A small capacitor from the output Q to the BYP pin will bypass the reference to lower the output voltage noise 1). If not used this pin must be left unconnected. 5 (DSO-8 EP) 7 (TSON-10) EN Enable. With the EN pin the TLS205B0 can be put into a low power shutdown state. The output will be off when the EN is pulled low. The EN pin can be driven either by 3.3 V or 5 V logic or as well by open-collector logic with pull-up resistor. The pull-up resistor is required to supply the pull-up current of the open-collector gate 2) and the EN pin current 3). Please note that if the EN pin is not used it must be connected to V I. It must not be left floating. 6 (DSO-8 EP) 6 (TSON-10) GND Ground. For the ADJ version connect the bottom of the output voltage setting resistor divider directly to the GND pin for optimum load regulation performance. |
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