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MCP2510-IST Datasheet(PDF) 75 Page - Microchip Technology

Part # MCP2510-IST
Description  Stand-Alone CAN Controller with SPI Interface
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP2510-IST Datasheet(HTML) 75 Page - Microchip Technology

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 2000 Microchip Technology Inc.
Preliminary
DS21291C-page 75
MCP2510
LIST OF FIGURES
Figure 1-1:
Block Diagram . . . . . . . . . . . . . . . . . . . . . . 3
Figure 1-2:
Typical System Implementation . . . . . . . . . 4
Figure 1-3:
CAN Buffers and Protocol Engine
Block Diagram . . . . . . . . . . . . . . . . . . . . . . 5
Figure 1-4:
CAN Protocol Engine Block Diagram . . . . . 6
Figure 2-1:
Standard Data Frame . . . . . . . . . . . . . . . . . 9
Figure 2-2:
Extended Data Frame. . . . . . . . . . . . . . . . 10
Figure 2-3:
Remote Data Frame . . . . . . . . . . . . . . . . . 11
Figure 2-4:
Error Frame . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 2-5:
Overload Frame . . . . . . . . . . . . . . . . . . . . 13
Figure 3-1:
Transmit Message Flowchart . . . . . . . . . . 16
Figure 4-1:
Receive Buffer Block Diagram . . . . . . . . . 22
Figure 4-2:
Message Reception Flowchart . . . . . . . . . 23
Figure 4-3:
Message Acceptance Mask and Filter
Operation . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 5-1:
Bit Time Partitioning . . . . . . . . . . . . . . . . . 35
Figure 5-2:
Lengthening a Bit Period . . . . . . . . . . . . . 37
Figure 5-3:
Shortening a Bit Period. . . . . . . . . . . . . . . 38
Figure 6-1:
Error Modes State Diagram . . . . . . . . . . . 42
Figure 8-1:
Crystal/Ceramic Resonator Operation . . . 49
Figure 8-2:
External Clock Source . . . . . . . . . . . . . . . 49
Figure 8-3:
External Series Resonant Crystal Oscillator
Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 11-1:
Bit Modify . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 11-2:
Read Instruction . . . . . . . . . . . . . . . . . . . . 58
Figure 11-3:
Byte Write Instruction . . . . . . . . . . . . . . . . 58
Figure 11-4:
Request To Send Instruction . . . . . . . . . . 59
Figure 11-5:
BIT Modify instruction . . . . . . . . . . . . . . . . 59
Figure 11-6:
Read Status Instruction . . . . . . . . . . . . . . 59
Figure 11-7:
RESET Instruction . . . . . . . . . . . . . . . . . . 60
Figure 11-8:
SPI Input Timing . . . . . . . . . . . . . . . . . . . . 60
Figure 11-9:
SPI Output Timing . . . . . . . . . . . . . . . . . . 60
LIST OF TABLES
Table 1-1:
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . 4
Table 4-10:
Filter/Mask Truth Table. . . . . . . . . . . . . . . 29
Table 7-1:
ICOD<2:0> Decode . . . . . . . . . . . . . . . . . 45
Table 10-1:
CAN Controller Register Map . . . . . . . . . . 55
Table 10-2:
Control Register Summary . . . . . . . . . . . . 55
Table 11-1:
SPI Instruction Set . . . . . . . . . . . . . . . . . . 58
Table 12-1:
DC Characteristics. . . . . . . . . . . . . . . . . . 61
Table 12-2:
Oscillator Timing Characteristics . . . . . . . 62
Table 12-3:
CAN Interface AC Characteristics . . . . . . 62
Table 12-4:
CLKOUT Pin AC/DC Characteristics . . . . 62
Table 12-5:
SPI Interface AC Characteristics . . . . . . . 63
LIST OF REGISTERS
Register 3-1:
TXBnCTRL Transmit Buffer n
Control Register . . . . . . . . . . . . . . . . . . 17
Register 3-2:
TXRTSCTRL - TXnRTS Pin Control and
Status Register . . . . . . . . . . . . . . . . . . . 18
Register 3-3:
TXBnSIDH - Transmit Buffer n
Standard Identifier High. . . . . . . . . . . . . 18
Register 3-4:
TXBnSIDL - Transmit Buffer n
Standard Identifier Low . . . . . . . . . . . . . 19
Register 3-5:
TXBnEID8 - Transmit Buffer n
Extended Identifier High . . . . . . . . . . . . 19
Register 3-6:
TXBnEID0 - Transmit Buffer n
Extended Identifier LOW . . . . . . . . . . . . 19
Register 3-7:
TXBnDLC - Transmit Buffer n
Data Length Code . . . . . . . . . . . . . . . . . 20
Register 3-8:
TXBnDm - Transmit Buffer n
Data Field Byte m . . . . . . . . . . . . . . . . . 20
Register 4-1:
RXB0CTRL - Receive Buffer 0
Control Register . . . . . . . . . . . . . . . . . . 24
Register 4-2:
RXB1CTRL - Receive Buffer 1
Control Register . . . . . . . . . . . . . . . . . . 25
Register 4-3:
BFPCTRL - RXnBF Pin Control and
Status Register . . . . . . . . . . . . . . . . . . . 26
Register 4-4:
RXBnSIDH - Receive Buffer n
Standard Identifier High. . . . . . . . . . . . . 26
Register 4-5:
RXBnSIDL - Receive Buffer n
Standard Identifier Low . . . . . . . . . . . . . 27
Register 4-6:
RXBnEID8 - Receive Buffer n
Extended Identifier Mid . . . . . . . . . . . . . 27
Register 4-7:
RXBnEID0 - Receive Buffer n
Extended Identifier Low. . . . . . . . . . . . . 27
Register 4-8:
RXBnDLC - Receive Buffer n
Data Length Code . . . . . . . . . . . . . . . . . 28
Register 4-9:
RXBnDM - Receive Buffer n
Data Field Byte m . . . . . . . . . . . . . . . . . 28
Register 4-10:
RXFnSIDH - Acceptance Filter n
Standard Identifier High. . . . . . . . . . . . . 30
Register 4-11:
RXFnSIDL - Acceptance Filter n
Standard Identifier Low . . . . . . . . . . . . . 31
Register 4-12:
RXFnEID8 - Acceptance Filter n
Extended Identifier High . . . . . . . . . . . . 31
Register 4-13:
RXFnEID0 - Acceptance Filter n
Extended Identifier Low. . . . . . . . . . . . . 31
Register 4-14:
RXMnSIDH - Acceptance Filter Mask n
Standard Identifier High. . . . . . . . . . . . . 32
Register 4-15:
RXMnSIDL - Acceptance Filter Mask n
Standard Identifier Low . . . . . . . . . . . . . 32
Register 4-16:
RXMnEID8 - Acceptance Filter Mask n
Extended Identifier High . . . . . . . . . . . . 32
Register 4-17:
RXMnEID0 - Acceptance Filter Mask n
Extended Identifier Low. . . . . . . . . . . . . 33
Register 5-1:
CNF1 - Configuration Register1 . . . . . . 39
Register 5-2:
CNF2 - Configuration Register2 . . . . . . 40
Register 5-3:
CNF3 - Configuration Register3 . . . . . . 40
Register 6-1:
TEC - Transmitter Error Counter . . . . . . 42
Register 6-2:
REC - Receiver Error Counter. . . . . . . . 42
Register 6-3:
EFLG - Error Flag Register . . . . . . . . . . 43
Table 7-1:
ICOD<2:0> Decode. . . . . . . . . . . . . . . . 45
Register 7-1:
CANINTE - Interrupt Enable Register . . 46
Register 7-2:
CANINTF - Interrupt FLAG Register . . . 47
Register 9-1:
CANCTRL - CAN Control Register . . . . 52
Register 9-2:
CANSTAT - CAN Status Register . . . . . 53


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