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X28HC64SIZ-70 Datasheet(PDF) 4 Page - Intersil Corporation |
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X28HC64SIZ-70 Datasheet(HTML) 4 Page - Intersil Corporation |
4 / 18 page 4 FN8109.3 August 18, 2015 DATA Polling (I/O7) The X28HC64 features DATA Polling as a method to indicate to the host system that the byte write or page write cycle has completed. DATA Polling allows a simple bit test operation to determine the status of the X28HC64, eliminating additional interrupt inputs or external hardware. During the internal programming cycle, any attempt to read the last byte written will produce the complement of that data on I/O7 (i.e. write data = 0xxx xxxx, read data = 1xxx xxxx). Once the programming cycle is complete, I/O7 will reflect true data. Toggle Bit (I/O6) The X28HC64 also provides another method for determining when the internal write cycle is complete. During the internal programming cycle I/O6 will toggle from HIGH to LOW and LOW to HIGH on subsequent attempts to read the device. When the internal cycle is complete the toggling will cease and the device will be accessible for additional read or write operations. DATA Polling I/O7 DATA Polling can effectively reduce the time for writing to the X28HC64. The timing diagram in Figure 2 illustrates the sequence of events on the bus. The software flow diagram in Figure 3 illustrates one method of implementing the routine. CE OE WE I/O7 X28HC64 Ready Last Write HIGH Z VOL VIH A0–A12 An An An An An An VOH An FIGURE 2. DATA POLLING BUS SEQUENCE WRITE DATA SAVE LAST DATA AND ADDRESS READ LAST ADDRESS IO7 COMPARE? NO YES WRITES COMPLETE? NO YES READY FIGURE 3. DATA POLLING SOFTWARE FLOW X28HC64 |
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