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LM3242 Datasheet(PDF) 6 Page - Texas Instruments |
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LM3242 Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 32 page  LM3242 SNOSB48E – OCTOBER 2011 – REVISED AUGUST 2015 www.ti.com 6.6 System Characteristics The following spec table entries are ensured by design providing the component values in the Typical Application are used. These parameters are not ensured by production testing. Minimum and Maximum values apply over the full operating ambient temperature range ( −30°C ≤ TA ≤ +90°C) and over the VIN range = 2.7 V to 5.5 V unless otherwise specified. L = 0.5 µH, DCR = 50 m Ω, CIN = 10 µF, 6.3 V, 0603 (1608), COUT = 4.7 µF, 6.3 V, 0402. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT D Maximum duty cycle 100% VIN = VGS = 3.1 V, IOUT = –500 mA RBP Bypass mode resistance(1) 75 m Ω VCON > 1.16 V 2.7 V ≤ VIN ≤ 5.5 V 750 2.5 × VCON ≤ VIN − 285 mV Maximum output current IOUT mA 2.7 V ≤ VIN ≤ 5.5 V capability 2.5 × VCON ≥ VIN – 165 mV, Bypass 1000 mode CVCON VCON input capacitance VCON = 1 V, Test frequency = 100 KHz < 1 pF −3% 3% VOUT VCON range 0.16 V to 1.44 V 0 mA ≤ IOUT ≤ 750 mA (2) Linearity −50 50 mV VIN = 3.6 V, VOUT = 0.8 V 75% IOUT = 10 mA, ECO mode VIN = 3.6 V, VOUT = 1.8 V η Efficiency 90% IOUT = 200 mA, PWM mode VIN = 3.9 V, VOUT = 3.3 V 95% IOUT = 500 mA, PWM mode VIN = 3.6 V to 4.2 V, TR = TF = 10 µs, LINE TR Line transient response 50 mVpk IOUT = 100 mA, VOUT = 0.8V VIN = 3.1 V/3.6 V/4.5 V, VOUT = 0.8 V, LOAD TR Load transient response IOUT = 50 mA to 150 mA 50 mVpk TR = TF = 0.1 µs (1) Total resistance in Bypass mode. Total includes the Bypass FET resistance in parallel with the PWM switch path resistance (PFET resistance and series inductor parasistic resistance.) (2) Linearity limits are ±3% or ±50 mV, whichever is larger. VOUT is monotonic in nature with respect to VCON input. 6.7 Timing Requirements MIN NOM MAX UNIT VOUT rise time, VCON change to 90% VIN = 3.7 V, VOUT = 1.4 V to 3.4 V 9 µs 0.1 µs < VCON_TR < 1 µs, RL = 12 Ω TVCON_TR VOUT fall time VCON change to 10% VIN = 3.7 V, VOUT = 3.4 V to 1.4 V 9 µs 0.1 µs < VCON_TF < 1 µs, RL = 12 Ω Turnon time (time for output to reach 95% final value after Enable low-to-high transition) TON 50(1) µs EN = Low-to-High, VIN = 4.2 V, VOUT = 3.4 V IOUT = < 1 mA, COUT = 4.7 µF TBP, NEG Auto bypass detect negative threshold delay time(2) 10 µs TBP, POS Auto bypass detect positive threshold delay time(3) 0.1 µs (1) This parameter is not production-limit tested. (2) Entering Bypass mode VIN is compared to the programmed output voltage (2.5 × VCON). When VIN − (2.5 × VCON) falls below VBP,NEG longer than TBP,NEG, the Bypass FET turns on, and the switching FET turns on. (3) Bypass mode is exited when VIN − (2.5 × VCON) exceeds VBP,POS longer than TBP,POS, and PWM mode resumes. The hysteresis for the bypass detection threshold VBP,POS – VBP,NEG is always be positive and will be approximately 50 mV. 6 Submit Documentation Feedback Copyright © 2011–2015, Texas Instruments Incorporated Product Folder Links: LM3242 |
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