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TLE42994 Datasheet(PDF) 6 Page - Infineon Technologies AG |
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TLE42994 Datasheet(HTML) 6 Page - Infineon Technologies AG |
6 / 36 page ![]() Data Sheet 6 Rev. 1.2, 2014-07-03 TLE42994 Pin Configuration 3 Pin Configuration 3.1 Pin Assignment TLE42994G (PG-DSO-8) Figure 3 Pin Configuration (top view) 3.2 Pin Definitions and Functions TLE42994G (PG-DSO-8) Pin Symbol Function 1I Input for compensating line influences, a capacitor to GND close to the IC terminals is recommended 2SI Sense Input connect the voltage to be monitored; connect to Q if the sense comparator is not needed 3RADJ Reset Threshold Adjust connect an external voltage divider to adjust reset threshold; connect to GND for using internal threshold 4D Reset Delay Timing connect a ceramic capacitor to GND for adjusting the reset delay time; leave open if the reset function is not needed 5GND Ground 6RO Reset Output open collector output; internally linked to the output via a 20 kΩ pull-up resistor; leave open if the reset function is not needed 7SO Sense Output open collector output; internally linked to the output via a 20 kΩ pull-up resistor; leave open if the sense comparator is not needed 8Q Output block to GND with a capacitor close to the IC terminals, respecting the values given for its capacitance C Q and ESR in “Functional Range” on Page 12 GND RO SO D5 6 7 RADJ 8 4 3 2 1 AEP01668 Q Ι S Ι |
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