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TPS54218 Datasheet(PDF) 3 Page - Texas Instruments |
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TPS54218 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 40 page VIN GND GND PH PH SS PH 1 4 3 2 16 15 14 13 12 9 10 11 5 6 7 8 Thermal Pad VIN TPS54218 www.ti.com SLVS974C – SEPTEMBER 2009 – REVISED DECEMBER 2014 6 Pin Configuration and Functions RTE (WQFN) PACKAGE 16 PINS (TOP VIEW) Pin Functions PIN I/O(1) DESCRIPTION NAME NO. AGND 5 G Analog ground should be electrically connected to GND close to the device. A bootstrap capacitor is required between BOOT and PH. If the voltage on this capacitor is below the BOOT 13 I minimum required by the BOOT UVLO, the output is forced to switch off until the capacitor is refreshed. Error amplifier output, and input to the output switch current comparator. Connect frequency COMP 7 O compensation components to this pin. Enable pin, internal pull-up current source. Pull below 1.2 V to disable. Float to enable. Can be used to EN 15 I set the on/off threshold (adjust UVLO) with two additional resistors. 3 GND G Power ground. This pin should be electrically connected directly to the power pad under the device. 4 10 The source of the internal high-side power MOSFET, and drain of the internal low-side (synchronous) PH 11 O rectifier MOSFET. 12 An open drain output, asserts low if output voltage is low due to thermal shutdown, overcurrent, PWRGD 14 O over/under-voltage or EN shut down. RT/CLK 8 I/O Resistor Timing or External Clock input pin. SS 9 I/O Slow-start. An external capacitor connected to this pin sets the output voltage rise time. Soft 1 VIN 2 I Input supply voltage, 2.95 V to 6 V. 16 VSENSE 6 I Inverting node of the transconductance (gm) error amplifier. GND pin should be connected to the exposed power pad for proper operation. This power pad should Thermal Pad G be connected to any internal PCB ground plane using multiple vias for good thermal performance. (1) I = Input, O = Output, G = Ground Copyright © 2009–2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS54218 |
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