TPS54310-Q1

SGLS280D − JANUARY 2005 − REVISED JUNE 2009

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6

PIN ASSIGNMENTS

1

2

3

4

5

6

7

8

9

10

20

19

18

17

16

15

14

13

12

11

AGND

VSENSE

COMP

PWRGD

BOOT

PH

PH

PH

PH

PH

RT

FSEL

SS/ENA

VBIAS

VIN

VIN

VIN

PGND

PGND

PGND

PWP PACKAGE

(TOP VIEW)

Terminal Functions

TERMINAL

DESCRIPTION

NAME

NO.

DESCRIPTION

AGND

1

Analog ground. Return for compensation network/output divider, slow-start capacitor, VBIAS capacitor, RT resistor, and

FSEL pin. Make PowerPAD connection to AGND.

BOOT

5

Bootstrap input. A 0.022-

µF to 0.1-µF low-ESR capacitor connected from BOOT to PH generates floating drive for the

high-side FET driver.

COMP

3

Error amplifier output. Connect the compensation network from COMP to VSENSE.

PGND

11−13

Power ground. High current return for the low-side driver and power MOSFET. Connect PGND with large copper areas to the

input and output supply returns and negative terminals of the input and output capacitors.

PH

6−10

Phase input/output. Junction of the internal high and low-side power MOSFETs and output inductor.

PWRGD

4

Power good open drain output. High when VSENSE

SS/ENA is low or internal shutdown signal active.

RT

20

SS/ENA

18

Slow-start/enableinput/output. Dual function pin which provides logic input to enable/disable device operation and capacitor

input to externally set the start-up time.

FSEL

19

Synchronization input. Dual function pin which provides logic input to synchronize to an external oscillator or pin select

between two internally set switching frequencies. When used to synchronize to an external signal, a resistor must be

connected to the RT pin.

VBIAS

17

Internal bias regulator output. Supplies regulated voltage to internal circuitry. Bypass VBIAS pin to AGND pin with a high

quality, low ESR 0.1-

µF to 1-µF ceramic capacitor.

VIN

14−16

Input supply for the power MOSFET switches and internal bias regulator. Bypass VIN pins to PGND pins close to the device

package with a high quality, low ESR 1-

µF to 10-µF ceramic capacitor.

VSENSE

2

Error amplifier inverting input.