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TPS62590-Q1 Datasheet(PDF) 3 Page - Texas Instruments |
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TPS62590-Q1 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 28 page MODE FB GND SW EN VIN 1 2 3 6 5 4 Thermal Pad TPS62590-Q1 www.ti.com SLVSAO5B – DECEMBER 2010 – REVISED OCTOBER 2015 5 Pin Configuration and Functions DRV Package 6-Pin SON With Exposed Thermal pad Top View Pin Functions PIN I/O DESCRIPTION NO. NAME This is the switch pin and is connected to the internal MOSFET switches. Connect the external inductor 1 SW O between this terminal and the output capacitor. MODE pin = high forces the device to operate in fixed-frequency PWM mode. Mode pin = low enables the 2 MODE I power-save mode with automatic transition from PFM mode to fixed-frequency PWM mode. Feedback pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of 3 FB I fixed output-voltage option, connect this pin directly to the output capacitor. This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode. Pulling 4 EN I this pin to high enables the device. This pin must be terminated. 5 VIN PWR VIN power supply pin 6 GND GND GND supply pin Thermal — — Must be soldered to achieve appropriate power dissipation. Should be connected to GND. pad Copyright © 2010–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS62590-Q1 |
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