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UCC24630 Datasheet(PDF) 3 Page - Texas Instruments |
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UCC24630 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 38 page 1 2 3 4 5 6 DRV GND VPC TBLK VSC VDD 1 2 3 4 5 6 UCC24630 www.ti.com SLUSC82A – MARCH 2015 – REVISED MARCH 2015 5 Pin Configuration and Functions DBV Package 6-Pin SOT23 Top View Pin Functions PIN I/O(1) DESCRIPTION NAME NO. DRV 4 O DRiVe is an output used to drive the gate of an external synchronous rectifier N-channel MOSFET switching transistor, with source pin connected to GND. GND 5 G The GrouND pin is both the reference pin for the controller and the low-side return for the drive output. Special care should be taken to return all AC decoupling capacitors as close as possible to this pin and avoid any common trace length with analog signal return paths. TBLK 3 – Time BLanK pin is used to select the blanking time of the VPC rising edge. A programmable range from 200 ns to 1 µs is available to prevent false detection of the primary on-time due to ringing during DCM operation. VDD 6 P VDD is the bias supply input pin to the controller. A carefully placed bypass capacitor to GND is required on this pin. VPC 1 I The Voltage during Primary Conduction pin is connected to a resistor divider from the SR MOSFET drain. This pin determines a sample of the primary-side MOSFET volt seconds during the primary on-time. This voltage programs a voltage controlled current source for the internal VPC ramp charging current. VSC 2 I The Voltage during Secondary Conduction pin is connected to a resistor divider from the power-supply output. This pin determines a sample of the secondary-side output voltage used to determine SR MOSFET conduction time. This voltage programs a voltage controlled current source for the internal VSC ramp charging current. (1) P = Power, G = Ground, I = Input, O = Output, I/O = Input/Output Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: UCC24630 |
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Similar Description - UCC24630_15 |
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