ADP3207A

Rev. 1 | Page 8 of 28 | www.onsemi.com

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

10

9

8

7

6

5

4

3

2

1

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

20

19

18

17

16

15

14

13

12

11

EN

PWRGD

PMON

FBRTN

FB

COMP

SS

STSET

DPRSLP

CLKEN

TTSENSE

VRTT

DCM

PWM2

PWM3

SW1

SW2

SW3

PWM1

OD

PIN 1

INDICATOR

ADP3207A

TOP VIEW

(Not to Scale)

Figure 5. Pin Configuration

Table 3. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

EN

Power Supply Enable Input. Pulling this pin to GND disables the PWM outputs and pulls the PWRGD output low.

2

PWRGD

Power-Good Output. Open-drain output that signals when the output voltage is outside of the proper operating

range. The pull-high voltage on this pin cannot be higher than VCC.

3

PMON

Power Monitor Output. After RC filter, the signal is proportional to the total output power of the buck converter.

4

CLKEN

Clock Enable Output. The pull-high voltage on this pin cannot be higher than VCC.

5

FBRTN

Feedback Return. VID DAC and error amplifier reference for remote sensing of the output voltage.

6

FB

Feedback Input. Error amplifier input for remote sensing of the output voltage.

7

COMP

Error Amplifier Output and Compensation Point.

8

SS

Soft-Start Delay Setting Input. An external capacitor connected between this pin and GND sets the soft-start

ramp-up time and the current-limit, latch-off delay time.

9

STSET

Soft Transient Slew Rate Timing Input. A capacitor from this pin to GND sets the slew rate of the output voltage

when transitioning between the boot voltage and the programmed VID voltage, and when transitioning

between active mode and deeper sleep mode.

10

DPRSLP

Deeper Sleep Control Input.

11

ILIMIT

Current-Limit Setpoint. An external resistor from this pin to GND sets the current-limit threshold of the converter.

12

VRPM

RPM Mode Reference Voltage Output.

13

RRPM

RPM Mode Timing Control Input. A resistor between this pin and VRPM sets the RPM mode turn-on threshold voltage.

14

RT

Multiphase Frequency Setting Input. An external resistor connected between this pin and GND sets the oscillator

frequency of the device when operating in multiphase PWM mode.

15

RAMPADJ

PWM Ramp Current Input. An external resistor from the converter input voltage to this pin sets the internal PWM

ramp.

16

LLSET

Output Load Line Programming Input. The center point of a resistor divider between CSREF and CSCOMP is

connected to this pin to set the load line slope.

17

CSREF

Current-Sense Reference Voltage Input. The voltage on this pin is used as the reference for the current-sense

amplifier and the power-good and crowbar functions. This pin should be connected to the common point of the

output inductors.

18

CSSUM

Current-Sense Summing Node. External resistors from each switch node to this pin sum the inductor currents

together to measure the total output current.

19

CSCOMP

Current-Sense Compensation Point. A resistor and capacitor from this pin to CSSUM determine the gain of the

current-sense amplifier and the positioning loop response time.