LC877917A

No.A1840-10/29

Pin Assignment

Pin name

I/O

Function

Option

VSS1, VSS2

-

• Power supply (-)

No

VDD1, VDD2, V2

-

• Power supply (+)

No

VDC

-

• Internal voltage

No

CUP1, CUP2

-

• Capacitor connecting terminals for step-up/step-down

No

PORT0

P00 to P07

I/O

• 8bit input/output port

• Data direction programmable for each bit

• Use of pull-up resistor can be specified for each bit individually

• Input for HOLD release

• Input for port 0 interrupt

• Other pin functions

P00: UART1-send

P01: UART1-receive

P04: System clock output (CKO)

P06: Timer6 toggle output

P07: Timer7 toggle output

AD converter input ports: AN0 (P00) – AN4 (P04)

Yes

PORT1

P10/S24 to

P17/S31

I/O

• 8bit input/output port

• Data direction programmable for each bit

• Use of pull-up resistor can be specified for each bit individually

• Other pin functions

P10: SIO0 data output

P11: SIO0 data input or bus input/output

P12: SIO0 clock input/output

P13: SIO1 data output

P14: SIO1 data input or bus input/output

P15: SIO1 clock input/output

P16: Timer 1 PWML output

P17: Timer 1 PWMH output/Buzzer output

Segment output for LCD: S24 (P10) – S31 (S17)

Yes

PORT3

P30

I/O

• 1bit Input/output port

• Data direction programmable

• Use of pull-up resistor can be specified

Yes

PORT7

P70 to P73

I/O

• 4bit Input/output port

• Data direction can be specified for each bit

• Use of pull-up resistor can be specified for each bit individually

• Other functions

P70: INT0 input/HOLD release input/Timer0L capture input/output for watchdog timer

P71: INT1 input/HOLD release input/Timer0H capture input

P72: INT2 input/HOLD release input/timer 0 event input/Timer0L capture input/NKIN

P73: INT3 input (noise rejection filter attached)/timer 0 event input/Timer0H capture input

AD converter input ports: AN5 (P70), AN6 (P71)

• Interrupt detection selection

No

Rising

Falling

Rising and falling

H level

L level

INT0

INT1

INT2

INT3

enable

enable

enable

enable

enable

enable

enable

enable

disable

disable

enable

enable

enable

enable

disable

disable

enable

enable

disable

disable

Continued on next page.