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LC87FBG08A Datasheet(PDF) 5 Page - ON Semiconductor |
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LC87FBG08A Datasheet(HTML) 5 Page - ON Semiconductor |
5 / 30 page LC87FBG08A No.A2046-5/30 Standby Function • HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation. 1) Oscillation is not halted automatically. 2) There are four ways of resetting the HALT mode. (1) Setting the reset pin to the low level (2) System resetting by low-voltage detection (3) System resetting by watchdog timer (4) Occurrence of an interrupt • HOLD mode: Suspends instruction execution and the operation of the peripheral circuits. 1) The CF, low-/medium-/ Frequency variable RC, and crystal oscillators automatically stop operation. Note: The oscillation of the low-speed RC oscillator is also controlled directly by the watchdog timer and its standby-mode-time oscillation is also controlled. 2) There are five ways of resetting the HOLD mode. (1) Setting the reset pin to the lower level. (2) System resetting by low-voltage detection (3) System resetting by watchdog timer (4) Having an interrupt source established at either INT0, INT1, INT2, INT4 * INT0 and INT1 HOLD mode reset is available only when level detection is set. (5) Having an interrupt source established at port 0. • X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer. 1) The CF, low-/medium-/ Frequency variable RC oscillators automatically stop operation. Note: The oscillation of the low-speed RC oscillator is also controlled directly by the watchdog timer and its standby-mode-time oscillation is also controlled. 2) The state of crystal oscillation established when the X'tal HOLD mode is entered is retained. 3) There are six ways of resetting the X'tal HOLD mode. (1) Setting the reset pin to the low level. (2) System resetting by watchdog timer or low-voltage detection. (3) System resetting by watchdog timer or low-voltage detection. (4) Having an interrupt source established at either INT0, INT1, INT2, INT4 * INT0 and INT1 HOLD mode reset is available only when level detection is set. (5) Having an interrupt source established at port 0. (6) Having an interrupt source established in the base timer circuit. Note: Available only when X’tal oscillation is selected. Onchip Debugger (flash versions only) • Supports software debugging with the microcontroller mounted on the target board. • Software break setting • Stepwise execution of instructions • Real time RAM data monitoring function All the RAM data map contents can be monitored and rewritten on the screen when the program is running. (Part of the SFR data cannot be rewritten.) • Two channels of on-chip debugger pins are available to be compatible with small pin count devices. DBGP0 (P0), DBGP1 (P1) Data Security Function (flash versions only) • Protects the program data stored in flash memory from unauthorized read or copy. Note: This data security function does not necessarily provide absolute data security. |
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