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NCP392D Datasheet(PDF) 8 Page - ON Semiconductor |
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NCP392D Datasheet(HTML) 8 Page - ON Semiconductor |
8 / 10 page NCP392D www.onsemi.com 8 VIN OVLO VOUT UVLO High−Z Figure 7. EN and ACOK Associated Timers tSTART tSTART2 tRISE tOFF ACOK EN tSTART tRISE tSTART2 ACOK Pin The NCP392D version integrates a ACOK status indicator. This is an open drain pin tied low when no fault is present (no TSd, no under voltage, no over voltage). When disabled, the ACOK feature is disabled too and the output pin is in high impedance mode. Thermal Shutdown Protection In case of internal overheating, the integrated thermal shutdown (TSD) protection allows to open the internal MOSFET in order to instantaneously decrease the device temperature. Embedded hysteresis allows to reengage the MOSFET when the junction temperature decreases. If the fault event is still present, the temperature increases again and engages the thermal shutdown one more time until fault event disappeared. PCB Recommendations To limit internal power dissipation, PCB routing must be carefully done to improve current capability. The NCP392D is declined in a CSP package. So power dissipation can be decreased on each pin connection but main thermal area must be as large as possible around IN and OUT pins. Taking into account and respectively, four IN and OUT pins must be hardwired together on the PCB. Maximum power dissipation can be calculated with the following formula: T J * TA + R qJA P d (eq. 3) TJ: junction temperature TA: ambient temperature RqJA: thermal resistance of the junction to air through the case and board. Pd: power dissipation = RDS(on) x I2 ESD Tests The NCP392D fully supports the IEC61000−4−2, level 4 (Input pin, 1 mF mounted on board). That means, in Air condition, Vin has a ±15 kV ESD protected input. In Contact condition, Vin has ±8 kV ESD protected input. Please refer to Figure 8 to see the IEC 61000−4−2 electrostatic discharge waveform. |
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