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NCP1240AD100R2G Datasheet(PDF) 6 Page - ON Semiconductor |
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NCP1240AD100R2G Datasheet(HTML) 6 Page - ON Semiconductor |
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6 / 45 page  NCP1240 www.onsemi.com 6 ELECTRICAL CHARACTERISTICS (For typical values TJ = 25°C, for min/max values TJ = −40°C to +125°C, VHV = 125 V, VCC = 11 V unless otherwise noted) Characteristics Unit Max Typ Min Symbol Test Condition OUTPUT DRIVER Rise Time, 10% to 90% of VCC VCC = VCC(min) + 0.2 V, CDRV = 1 nF trise − 40 70 ns Fall Time, 90% to 10% of VCC VCC = VCC(min) + 0.2 V, CDRV = 1 nF tfall − 40 70 ns Current Capability VCC = VCC(min) + 0.2 V, CDRV = 1 nF DRV high, VDRV = 0 V DRV low, VDRV = VCC IDRV(source) IDRV(sink) − − 500 800 − − mA Clamping Voltage (maximum gate voltage) VCC = VCCmax – 0.2 V, DRV high, RDRV = 33 kW, Cload = 220 pF VDRV(clamp) 11 13.5 16 V High−state Voltage Drop VCC = VCC(min) + 0.2 V, RDRV = 33 kW, DRV high VDRV(drop) − − 1 V CURRENT SENSE Input Pull−up Current VCS = 0.7 V Ibias − 1 − mA Maximum Internal Current Setpoint VFB > 3.5 V VILIM 0.66 0.70 0.74 V Propagation Delay from VIlimit Detection to DRV Off VCS = VILIM tdelay − 80 110 ns Leading Edge Blanking Duration for VILIM tLEB 200 250 340 ns Threshold for Fast Fault Protection Activation VCS(stop) 0.95 1.05 1.15 V Leading Edge Blanking Duration for VCS(stop) (Note 7) tBCS 90 120 150 ns Soft−start Duration From 1st pulse to VCS = VILIM tSSTART 8 11 14 ms INTERNAL SLOPE COMPENSATION Slope of the Compensation Ramp Scomp(65kHz) Scomp(100kHz) − − −32.5 −50 − − mV / ms FEEDBACK Internal Pull−up Resistor TJ = 25°C RFB(up) 30 40 50 k W VFB to Internal Current Setpoint Division Ratio KFB − 4 − − Internal Pull−up Voltage on the FB Pin (Note 7) VFB(ref) 4.5 5 5.5 V Feedback Voltage Below which the Peak Current is Frozen TJ = 25°C VFB(off) − 0.8 − V SKIP CYCLE MODE Feedback Voltage Thresholds for Skip Mode VFB going down, TJ = 25°C VFB going up, TJ = 25°C Vskip(in) Vskip(out) 1.1 1.2 1.2 1.3 1.3 1.4 V REMOTE CONTROL ON FB PIN The Voltage Above which the Part Enters the On Mode VCC > VCC(off), VHV = 60 V VON − 2.2 − V The Voltage Below which the Part Enters the Off Mode VCC > VCC(off) VOFF 0.5 0.6 0.7 V Minimum Hysteresis Between the VON and VOFF VCC > VCC(off), VHV = 60 V VHYST 500 − − mV Pull−up Current in Off Mode VCC > VCC(off) IOFF − 5 − mA 5. VCC(off) < VCC(min) with the minimum gap 0.5 V. 6. Internal supply current only, currents sourced via FB pin is not included (current is flowing in GND pin only). 7. Guaranteed by design. 8. CS pin source current is a sum of Ibias and IOPC, thus at VHV = 125 V is observed the Ibias only, because IOPC is switched off. |
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