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PCS3I2005AG-08SR Datasheet(PDF) 2 Page - ON Semiconductor |
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PCS3I2005AG-08SR Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 7 page PCS3P2005A http://onsemi.com 2 Figure 1. Block Diagram GND ModOUT VDD PLL D_C S0 FRS Crystal Oscillator XOUT CLKIN / XIN Table 1. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Rating Unit VDD, VIN Voltage on any input pin with respect to Ground −0.5 to +7.0 V TSTG Storage temperature −65 to +125 °C Ts Max. Soldering Temperature (10 sec) 260 °C TJ Junction Temperature 150 °C TDV Static Discharge Voltage (As per JEDEC STD22− A114−B) 2 KV Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Table 2. PIN DESCRIPTION Pin# Pin Name Type Description 1 CLKIN / XIN I External reference Clock input or Crystal connection. 2 XOUT O Crystal connection. If using an external reference, this pin must be left unconnected. 3 D_C I Deviation Selection. Has an internal pull−up resistor. Refer to Deviation Selection Table. 4 GND P Ground connection. 5 S0 I Deviation Selection. Has an internal pull−up resistor. Refer to Deviation Selection Table. 6 FRS I Frequency Range Selection. Has an internal pull−up resistor. 7 ModOUT O Buffered Modulated Clock Output. 8 VDD P Power supply for the entire chip (3.3 V/5 V). Table 3. FREQUENCY RANGE SELECTION TABLE FRS Frequency (MHz) 0 10 − 30 1 30 − 100 Table 4. DEVIATION SELECTION TABLE Deviation (%) D_C S0 FS = 0 FS = 1 10 MHz 20 MHz 30 MHz 30 MHz 80 MHz 100 MHz 0 0 −4.5 −3.6 −1.7 −4.8 −3.6 −2.6 0 1 −2.6 −2 −1 −2.7 −2 −1.5 1 0 ±2.6 ±2 ±1 ±2.75 ±2 ±1.5 1 1 ±1.7 ±1.25 ±0.7 ±1.8 ±1.25 ±1 |
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