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NCP3232NMNTXG Datasheet(PDF) 11 Page - ON Semiconductor |
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NCP3232NMNTXG Datasheet(HTML) 11 Page - ON Semiconductor |
11 / 14 page NCP3232N www.onsemi.com 11 OVERVIEW The NCP3232N is a 500 kHz, high efficiency, high current PWM synchronous buck converter. It operates with a single supply voltage from 4.5 to 21 V and provide output current as high as 15 A. NCP3232N utilizes voltage mode with voltage feed-forward control to response instantly to Vin changes and provide for easier compensation over the supply range of the converter. The device also includes pre-bias startup capability to allow monotonic startup in the event of a pre-biased output condition. Protection features include overcurrent protection (OCP), output over and under voltage protection (OVP, UVP), and power good. The enable function is highly programmable to allow for adjustable startup voltages at higher input voltages. There is also an adjustable soft-start, and over-temperature/over-voltage comparator, and internal thermal shutdown. Reference Voltage The NCP3232N incorporates an internal reference that allows output voltages as low as 0.6 V. The tolerance of the internal reference is guaranteed over the entire operating temperature range of the controller. The reference voltage is trimmed using a test configuration that accounts for error amplifier offset and bias currents. Oscillator Ramp The ramp waveform is a saw tooth form at the PWM frequency with a peak-to-peak amplitude of VCC/6.6, offset from GND by typically 0.64 V. The PWM duty cycle is limited to a maximum of 92%, allowing the bootstrap capacitors to charge during each cycle. Error Amplifier The error amplifier’s primary function is to regulate the converter’s output voltage using a resistor divider connected from the converter’s output to the FB pin of the controller, as shown in the Applications Schematic. A type III compensation network must be connected around the error amplifier to stabilize the converter. It has a bandwidth of greater than 24 MHz, with open loop gain of at least 60 dB. Programmable Soft-Start An external capacitor connected from the SS pin to ground sets up the soft start period, which can limit the start-up inrush current. The soft start period can be programmed based on the Equation 1. tss + C SS @ Vref I SS (eq. 1) OCP is the only fault that is active during a soft-start. Adaptive Non-Overlap Gate Driver In a synchronous buck converter, a certain dead time is required between the low side drive signal and high side drive signal to avoid shoot through. During the dead time, the body diode of the low side FET freewheels the current. The body diode has much higher voltage drop than that of the MOSFET, which reduces the efficiency significantly. The longer the body diode conducts, the lower the efficiency. NCP3232N implements adaptive dead time control to minimize the dead time, as well as preventing shoot through. Precision Enable (EN) The ENABLE block allows the output to be toggled on and off and is a precision analog input. When the EN voltage exceeds V_EN, the controller will initiate the soft-start sequence as long as the input voltage and sub-regulated voltage have exceeded their UVLO thresholds. V_EN_hyst helps to reject noise and allow the pin to be resistively coupled to the input voltage or sequenced with other rails. If the EN voltage is held below typically 0.8 V, the NCP3232N enters a deep disable state where the internal bias circuitry is off. As the voltage at EN continues to rise, the Enable comparator and reference are active and provide a more accurate EN threshold. The drivers are held off until the rising voltage at EN crosses V_EN. An internal 2 mA pullup automatically enables the device when the EN pin is left floating. EN VDD 2 uA 1.2 V Enable Logic INPUT SUPPLY / VCC Figure 22. Enable Functional Block Diagram Pre-bias Startup In some applications the controller will be required to start switching when its output capacitors are charged anywhere from slightly above 0 V to just below the regulation voltage. This situation occurs for a number of reasons: the converter’s output capacitors may have residual charge on them or the converter’s output may be held up by a low current standby power supply. NCP3232N supports pre bias start up by holding off switching until the feedback voltage and thus the output voltage rises above the set regulated voltage. If the pre-bias voltage is higher than the set regulated voltage, switching does not occur until the output voltage drops back to the regulation point. |
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