NCP1589D

http://onsemi.com

6

APPLICATIONS INFORMATION

Overcurrent Protection (OCP)

The NCP1589D monitors the voltage across the low side

MOSFET and used this information to determine if there is

excessive output current. The voltage across the low side

MOSFET is measured from the LX pin when it is conducted,

and is referenced to ground. The overcurrent measurement

is timed to occur at the end of the low side MOSFET

conduction period.

If the voltage drop across the bottom MOSFET exceeds

the overcurrent protection threshold, then an internal

counter is triggered and incremented. If the voltage drop

does not exceed the threshold for the next cycle, the internal

counter will be reset. The NCP1589D will latch the over

current protection fault condition after 4 consecutive cycles

of overcurrent events.

When the NCP1589D latches an overcurrent protection

fault, both the high side and low side MOSFETs are turned

off. To reset the overcurrent protection fault, the power to the

The overcurrent threshold can be set externally, by

pins both pass the undervoltage lockout threshold, the

NCP1589D will source a 10

mA current from LG pin through

be sampled and locked by the device as the overcurrent

the 10

mA of current will yield a 100 mV threshold, and if

the voltage across the low side MOSFET exceeds 100 mV

at the end of the its conduction period, an overcurrent event

will be detected. The OCP threshold is only associated with

power on reset, and won’t be wiped out by pulling COMP

pin down (disabling the part).

protection threshold will max out at 640 mV. The

yields a threshold voltage range of 50 mV to 600 mV.

Internal Soft−Start

To prevent excess inrush current during startup, the

NCP1589D uses a calibrated current source with an internal

soft−start capacitor to ramp the reference voltage from 0 V

to 800 mV over a period of around 4 ms. The soft−start ramp

generator will reset if the input power supply voltages reach

the undervoltage lockout threshold, or if the NCP1589D is

disabled by having the COMP pin pulled low.

Startup into a Precharged Load

During a startup, the NCP1589D will detect the residual

charge on the output capacitors. Instead of fully discharging

the capacitors, the soft−start will begin from the precharged

output voltage level. For example, if the NCP1589D is

configured to provide a regulated output voltage of 2.5 V, the

normal soft−start sequence will ramp the output voltage

from 0 to 2.5 V in 4.2 ms; however if the output capacitors

already has 1.2 V voltage, the NCP1589D will not discharge

the capacitors, instead the soft−start sequence will begin at

1.2 V and then ramp the output up to 2.5 V.

Power Good

The PGOOD pin is an open drain connection, with an

active high output to signal the condition of the converter.

PGOOD is pulled low during soft−start cycle, and if there is

overvoltage or undervoltage fault. If the voltage on the FB

pin is within

will not be pulled low. The PGOOD pin does not have an

internal pull-up resistor.

Overvoltage Protection (OVP)

If the voltage on the FB pin exceeds the overvoltage

latch an overvoltage fault. During an overvoltage fault event

the UG pin will be pulled low, and the LG pin will stay high

If the overvoltage fault condition stays, the NCP1589D will

continue drive the LG pin, LG will go high if FB exceeds

1000 mV, then go low when FB is below 400 mV. The power

of the NCP1589D needs to be cycled up to clear the

overvoltage fault.

Undervoltage Protection (UVP)

If the voltage on the FB pin falls below the undervoltage

threshold after the soft−start cycle completes, then the

NCP1589D will latch an undervoltage fault. During an

undervoltage fault, both the UG and LG pins will be pulled

low. Toggling power or COMP pin will reset the

undervoltage protection unit.

VORPM (RPM threshold)

The NCP1589D runs in RPM mode, its switching

frequency is controlled by COMP ripple voltage and RPM

threshold. The VORPM pin is connected to the output

voltage through an external divider. This voltage value is

proportional to the output voltage and sets the RPM

threshold voltage internally with input voltage information

obtained through the switch node. The internal RPM

DTH +

R9

R10)R9

(eq. 1)

Where R9/R10 (Figure 1) is the input voltage divider of

the offset voltage of the threshold.

Each time when COMP voltage exceeds RPM threshold

voltage, an internal ramp signal is started and UG is driven

high. When the internal ramp intercepts with COMP

voltage, the UG pin is reset low. The NCP1589D system

operates at pseudo-fixed frequency in continuous current