TPS2836, TPS2837

SYNCHRONOUSBUCK MOSFET DRIVER

WITH DEADTIME CONTROL

SLVS224B − NOVEMBER 1999 − REVISED AUGUST 2002

4

POST OFFICE BOX 655303

electrical characteristics over recommended operating virtual junction temperature range,

supply current

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Supply voltage range

4.5

15

V

Quiescent current

VCC =15 V,

V(ENABLE) = LOW

100

A

VCC

Quiescent current

VCC =15 V,

V(ENABLE) = HIGH

300

400

µA

VCC

Quiescent current

VCC =12 V,

fSWX = 200 kHz,

CHIGHDR = 50 pF,

BOOTLO grounded,

CLOWDR = 50 pF,

See Note 2

3

mA

NOTE 2: Ensured by design, not production tested.

output drivers

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

High-side sink

Duty cycle < 2%,

VBOOT – VBOOTLO = 4.5 V, VHIGHDR = 4 V

0.7

1.1

High-side sink

(see Note 4)

Duty cycle < 2%,

tpw < 100 µs

(see Note 3)

VBOOT – VBOOTLO = 6.5 V, VHIGHDR = 5 V

1.1

1.5

A

(see Note 4)

tpw < 100 µs

(see Note 3)

VBOOT – VBOOTLO = 12 V, VHIGHDR = 10.5 V

2

2.4

A

High-side

Duty cycle < 2%,

VBOOT – VBOOTLO = 4.5 V, VHIGHDR = 0.5V

1.2

1.4

High-side

source

(see Note 4)

Duty cycle < 2%,

tpw < 100 µs

(see Note 3)

VBOOT – VBOOTLO = 6.5 V, VHIGHDR = 1.5 V

1.3

1.6

A

Peak output-

source

(see Note 4)

tpw < 100 µs

(see Note 3)

VBOOT – VBOOTLO = 12 V, VHIGHDR = 1.5 V

2.3

2.7

A

Peak output-

current

Low-side sink

Duty cycle < 2%,

VCC = 4.5 V,

VLOWDR = 4 V

1.3

1.8

current

Low-side sink

(see Note 4)

Duty cycle < 2%,

tpw < 100 µs

(see Note 3)

VCC = 6.5 V,

VLOWDR = 5 V

2

2.5

A

(see Note 4)

tpw < 100 µs

(see Note 3)

VCC = 12 V,

VLOWDR = 10.5 V

3

3.5

A

Low-side

Duty cycle < 2%,

VCC = 4.5 V,

VLOWDR = 0.5V

1.4

1.7

Low-side

source

(see Note 4)

Duty cycle < 2%,

tpw < 100 µs

(see Note 3)

VCC = 6.5 V,

VLOWDR = 1.5 V

2

2.4

A

source

(see Note 4)

tpw < 100 µs

(see Note 3)

VCC = 12 V,

VLOWDR = 1.5 V

2.5

3

A

VBOOT – VBOOTLO = 4.5 V, VHIGHDR = 0.5 V

5

High-side sink (see Note 4)

VBOOT – VBOOTLO = 6.5 V, VHIGHDR = 0.5 V

5

Ω

High-side sink (see Note 4)

VBOOT – VBOOTLO = 12 V, VHIGHDR = 0.5 V

5

Ω

VBOOT – VBOOTLO = 4.5 V, VHIGHDR = 4 V

75

High-side source (see Note 4)

VBOOT – VBOOTLO = 6.5 V, VHIGHDR = 6 V

75

Ω

Output

High-side source (see Note 4)

VBOOT – VBOOTLO = 12 V, VHIGHDR =11.5 V

75

Ω

Output

resistance

VDRV = 4.5 V,

VLOWDR = 0.5 V

9

resistance

Low-side sink (see Note 4)

VDRV = 6.5 V

VLOWDR = 0.5 V

7.5

Ω

Low-side sink (see Note 4)

VDRV = 12 V,

VLOWDR = 0.5 V

6

Ω

VDRV = 4.5 V,

VLOWDR = 4 V

75

Low-side source (see Note 4)

VDRV = 6.5 V,

VLOWDR = 6 V

75

Ω

Low-side source (see Note 4)

VDRV = 12 V,

VLOWDR = 11.5 V

75

NOTES:

3. Ensured by design, not production tested.

4. The pullup/pulldown circuits of the drivers are bipolar and MOSFET transistors in parallel. The peak output current rating is the

combined current from the bipolar and MOSFET transistors. The output resistance is the rDS(on) of the MOSFET transistor when

the voltage on the driver output is less than the saturation voltage of the bipolar transistor.