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IC61C256AH-15TI Datasheet(PDF) 2 Page - Integrated Circuit Solution Inc |
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IC61C256AH-15TI Datasheet(HTML) 2 Page - Integrated Circuit Solution Inc |
2 / 9 page IC61C256AH 2 Integrated Circuit Solution Inc. AHSR010-0D 4/19/2002 ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc. FEATURES • High-speed access times: 10, 12, 15, 20, 25 ns • Low active power: 400 mW (typical) • Low standby power -- 250 µW (typical) CMOS standby -- 55 mW (typical) TTL standby • Fully static operation: no clock or refresh required • TTL compatible interface and outputs • Single 5V power supply DESCRIPTION The ICSI IC61C256AH is very high-speed, low power, 32,768 word by 8-bit static RAMs. They are fabricated using ICSI's high-performance CMOS technology. This highly reliable pro- cess coupled with innovative circuit design techniques, yields access times as fast as 8 ns maximum. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation is reduced to 50 µW (typical) with CMOS input levels. Easy memory expansion is provided by using an active LOW Chip Enable ( CE). The active LOW Write Enable (WE) controls both writing and reading of the memory. The IC61C256AH is pin compatible with other 32k x 8 SRAMs and are available in 28-pin 300mil PDIP, 300mil SOJ, and 8*13.4mm TSOP-1 package, 330 mil SOP. 32K x 8 HIGH-SPEED CMOS STATIC RAM FUNCTIONAL BLOCK DIAGRAM A0-A14 CE OE WE 32K X 8 MEMORY ARRAY DECODER COLUMN I/O CONTROL CIRCUIT GND VCC I/O DATA CIRCUIT I/O0-I/O7 |
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