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AS1860 Datasheet(PDF) 6 Page - List of Unclassifed Manufacturers |
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AS1860 Datasheet(HTML) 6 Page - List of Unclassifed Manufacturers |
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6 / 51 page  AS1860 Akros Silicon, Inc. 6399 San Ignacio Avenue, Suite 250, San Jose, CA 95119 USA 408.746.9000 http://www.AkrosSilicon.com 6 PIN ASSIGNMENTS AND DESCRIPTIONS Figure 1 - AS1860 Pin Assignments Table 1 - AS1860 Signal Descriptions - Primary Side Pin Name I/O1 Description Primary-Side: PD Controller 15 48VIN P AS1860 startup power input. Paddle #1 48RTN P Input power return. One of three bottom side device connections, 48RTN (Paddle #1) is connected to the internal PD Power MOSFET source. 48RTN is connected to 48N (Paddle #2) via this internal inrush current limiting power MOSFET. Paddle #2 48N P Primary-side Transformer power return. One of three bottom side device connections, 48N (Paddle #2) provides the power return for the DC-DC controller transformer primary. 48N is connected to the internal PD Power MOSFET drain. 48N is connected to 48RTN via this internal inrush current limiting power MOSFET. 16 LDET D, I Local Power Enable Input. Enables use of local power for the DC-DC controller and disables PD functions. When activated this disables the PoE PD signature capability that normally uses the RSIG signature resistor. Refer to Figure 3 for a typical LDET circuit configuration and Table 16 for resistor values. If Local power detection is not required, connect LDET to 48VIN. Note that LDET must NOT be tied to 48RTN. In Software mode, the LDET status can be read from the PD Status & Control Register. 19 RCLASS A PoE Classification Resistor. See Table 14 for resistor value. Connect the classification resistor between this input and the 48RTN (Paddle #1). The resistor is automatically disconnected after a valid PD classification. 17 RSIG A, I PoE Signature Resistor. Connect a 26.7KΩ signature resistor from RSIG to 48VIN. This resistor is automatically disconnected after a valid PD detection. 18 CLIM I Sets internal PD Power MOSFET current limit in PoE operation mode; should be pulled either High (VDD5I) or Low (48RTN). In Local Mode (LDET active), CLIM is not used. High = VDD5I = ILIM_AT (see Electrical Characteristics) Low = 48RTN = ILIM_AF (see Electrical Characteristics) Primary-Side: Common Power Pins 12 VBP P Internal bias node, decouple with an external capacitor to VBIAS. 13 VBIAS P Bias voltage input (typically from a power transformer winding). |
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