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NCP4305DDR2G Datasheet(PDF) 7 Page - ON Semiconductor |
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NCP4305DDR2G Datasheet(HTML) 7 Page - ON Semiconductor |
7 / 52 page NCP4305 www.onsemi.com 7 ELECTRICAL CHARACTERISTICS −40 °C ≤ TJ ≤ 125°C; VCC = 12 V; CDRV = 0 nF; RMIN_TON = RMIN_TOFF = 10 kW; VTRIG/DIS = 0 V; VLLD = 0 V; VCS = −1 to +4 V; fCS = 100 kHz, DCCS = 50%, unless otherwise noted. Typical values are at TJ = +25°C Parameter Unit Max Typ Min Symbol Test Conditions SUPPLY SECTION Current Consumption, RMIN_TON = RMIN_TOFF = 0 kW CLOAD = 0 nF, fSW = 500 kHz A, C ICC 3.3 4.0 5.6 mA B, D, Q 3.8 4.5 6.0 CLOAD = 1 nF, fSW = 500 kHz A, C 4.5 6.0 7.5 B, D, Q 7.7 9.0 10.7 CLOAD = 10 nF, fSW = 500 kHz A, C 20 25 30 B, D, Q 40 50 60 Current Consumption No switching, VCS = 0 V, RMIN_TON = RMIN_TOFF = 0 k ICC 1.5 2.0 2.5 mA Current Consumption below UVLO No switching, VCC = VCCOFF – 0.1 V, VCS = 0 V ICC_UVLO 75 125 mA Current Consumption in Disable Mode VLLD = VCC − 0.1 V, VCS = 0 V ICC_DIS 40 55 70 mA VTRIG = 5 V, VLLD = VCC – 3 V, VCS = 0 V 45 65 80 DRIVER OUTPUT Output Voltage Rise−Time CLOAD = 10 nF, 10% to 90% VDRVMAX tr 40 55 ns Output Voltage Fall−Time CLOAD = 10 nF, 90% to 10% VDRVMAX tf 20 35 ns Driver Source Resistance RDRV_SOURCE 1.2 W Driver Sink Resistance RDRV_SINK 0.5 W Output Peak Source Current IDRV_SOURCE 4 A Output Peak Sink Current IDRV_SINK 8 A Maximum Driver Output Voltage VCC = 35 V, CLOAD > 1 nF, VLLD = 0 V, (ver. B, D and Q) VDRVMAX 9.0 9.5 10.5 V VCC = 35 V, CLOAD > 1 nF, VLLD = 0 V, (ver. A, C) 4.3 4.7 5.5 Minimum Driver Output Voltage VCC = VCCOFF + 200 mV, VLLD = 0 V, (ver. B) VDRVMIN 7.2 7.8 8.5 V VCC = VCCOFF + 200 mV, VLLD = 0 V, (ver. C) 4.2 4.7 5.3 VCC = VCCOFF + 200 mV, VLLD = 0 V, (ver. A) 3.6 4.0 4.4 VCC = VCCOFF + 200 mV, VLLD = 0 V, (ver. D, Q) 3.8 4.0 4.4 Minimum Driver Output Voltage VLLD = VCC − VLLDREC V VDRVLLDMIN 0.0 0.4 1.2 V CS INPUT Total Propagation Delay From CS to DRV Output On VCS goes down from 4 to −1 V, tf_CS = 5 ns tPD_ON 35 60 ns Total Propagation Delay From CS to DRV Output Off VCS goes up from −1 to 4 V, tr_CS = 5 ns tPD_OFF 12 23 ns CS Bias Current VCS = −20 mV ICS −105 −100 −95 mA Turn On CS Threshold Voltage VTH_CS_ON −120 −75 −40 mV Turn Off CS Threshold Voltage Guaranteed by Design VTH_CS_OFF −1 0 mV Turn Off Timer Reset Threshold Voltage VTH_CS_RESET 0.42 0.48 0.54 V CS Leakage Current VCS = 200 V ICS_LEAKAGE 0.4 mA TRIGGER DISABLE INPUT Minimum Trigger Pulse Duration VTRIG = 5 V; Shorter pulses may not be proceeded tTRIG_PW_MIN 10 ns Trigger Threshold Voltage VTRIG_TH 1.95 2.02 2.15 V Trigger to DRV Propagation Delay VTRIG goes from 0 to 5 V, tr_TRIG = 5 ns tPD_TRIG 7.5 12.5 ns Trigger Blank Time After DRV Turn−on Event VCS drops below VTH_CS_ON tTRIG_BLANK 35 50 65 ns |
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