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LA6571 Datasheet(PDF) 2 Page - ON Semiconductor |
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LA6571 Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 7 page LA6571 No.7739-2/7 Electrical Characteristics at Ta = 25 °C, VCC1 = 5V, VCC2 = 12V, VREF-IN = 1.65V, unless especially specified Ratings Parameter Symbol Conditions min typ max Unit [ALL Blocks] No-load current drain ON ICC ON All outputs ON *1 30 50 mA No-load current drain OFF ICC OFF All outputs OFF *1 10 20 mA VREF input voltage range VREF-IN 1 VCC2-1 V Thermal shutdown temperature TSD *7 150 175 200 °C [BTL AMP Block] (CH1 to CH5) Output offset voltage VOFF Voltage difference in output between BTL AMP and each channel. -50 50 mV Output offset voltage VOFF1 Voltage difference in output between BTL AMP and each channel. -80 80 mV Output voltage VO CH1,CH2 *3 3.2 4.0 V Output voltage VO1 CH3,CH4,CH5 *4 9.7 10.5 V Closed-circuit voltage gain VG1 Gain between input and output for CH1, CH2, and CH5 *2 4.2 5.0 6.0 times Closed-circuit voltage gain VG3 Gain between input and output for CH3 and CH4 *2 8.2 9.0 11.0 times Slew rate SR AMP Independent. Multiply 2 between outputs. *7 0.5 V/ μs MUTE ON voltage VMUTE ON Each MUTE *6 2 V MUTE OFF voltage VMUTE OFF Each MUTE *6 0.5 V [Input AMP Block] Input voltage range VIN op 0 VCC2-1.5 V Output offset voltage VOFF op -10 10 mV Output current (SINK) SINK op 2 mA Output current (SOURCE) SOURCE op *5 300 500 μA [Power Supply Block] (PNP transistor: 2SB632K) Regulator output VOUT For error Amp, RL = 10kΩ at buffer 1.2 1.3 1.4 V REG-IN SINK current REG-IN-SINK Base current to external PNP 5 10 mA Line regulation ΔVOLN 6V ≤ VCC ≤ 12V, IO = 200mA 20 150 mV Load regulation ΔVOLD 5mA ≤ IO ≤ 200mA 50 200 mV *1. Current dissipation that is a sum of VCC1 and VCC2 at no load. *2. Input AMP is a BUFFER AMP. *3. Voltage difference between both ends of load (8 Ω). Output saturated. *4. Voltage difference between both ends of load (12 Ω). Output saturated. *5. The source of input OP-AMP is a constant current. (See the specified block diagram.) As the 11k Ω resistance to the next stage is a load, pay due attention when setting the input OP-AMP gain. *6. Output ON with MUTE: [H] and OFF with MUTE: [L] (HI impedance). *7. Design guarantee value |
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