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M37211M2-526SP Datasheet(PDF) 6 Page - Mitsubishi Electric Semiconductor |
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M37211M2-526SP Datasheet(HTML) 6 Page - Mitsubishi Electric Semiconductor |
6 / 59 page MITSUBISHI MICROCOMPUTERS M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP M37210E4-XXXSP/FP, M37210E4SP/FP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER with ON-SCREEN DISPLAY CONTROLLER 6 FUNCTIONAL DESCRIPTION Central Processing Unit (CPU) The M37210M3-XXXSP/FP uses the standard 740 family instruction set. Refer to the table of 740 family addressing modes and machine instructions or the SERIES 740 〈Software〉 User’s Manual for details on the instruction set. Machine-resident 740 family instructions are as follows : The FST and SLW instruction cannot be used. The MUL, DIV, WIT, and STP instruction can be used. CPU Mode Register The CPU mode register is allocated at address 00FB16. The CPU mode register contains the stack page selection bit. Note : Please beware of this bit when programming because it is set to “1” after the reset release. Especially the internal RAM of the M37211M2-XXXSP is in the zero page, so be sure to set this bit to “0”. Fig. 1 Structure of CPU mode register 70 Fix these bits to “002” CPU mode register (CPUM : address 00FB16) Stack page selection bit (Note) 0 : Zero page 1 : 1 page Fix these bits to “11112” 0 0 1 1 1 1 1 |
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