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ASM690A Datasheet(PDF) 2 Page - ON Semiconductor |
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ASM690A Datasheet(HTML) 2 Page - ON Semiconductor |
2 / 12 page ASM690A/692A, ASM802L/802M, ASM805L http://onsemi.com 2 Figure 1. Typical Operating Circuit Figure 2. Block Diagram Table 1. PIN DESCRIPTION Pin Number Name Function ASM690A/ASM692A ASM802L/ASM802M ASM805L 1 1 VOUT Voltage supply for RAM. When VCC is above the reset threshold, VOUT connects to VCC through a P−Channel MOS device. If VCC falls below the reset threshold, this output will be connected to the backup supply at VBATT (or VCC, whichever is higher) through the MOS switch to provide continuous power to the CMOS RAM. 2 2 VCC +5 V power supply input. 3 3 GND Ground. 4 4 PFI Power failure monitor input. PFI is connected to the internal power fail comparat- or which is referenced to 1.25 V. The power fail output (PFO) is active LOW but remains HIGH if PFI is above 1.25 V. If this feature is unused, the PFI pin should be connected to GND or VOUT. 5 5 PFO Power−fail output. PFO is active LOW whenever the PFI pin is less than 1.25 V. 6 6 WDI Watchdog input. The WDI input monitors microprocessor activity. An internal timer is reset with each transition of the WDI input. If the WDI is held HIGH or LOW for longer than the watchdog timeout period, typically 1.6 seconds, RESET (or RESET) is asserted for the reset pulse width time, tRS, of 140 ms, minimum. 7 − RESET Active−LOW reset output. When triggered by VCC falling below the reset threshold or by watchdog timer timeout, RESET pulses low for the reset pulse width tRS, typically 200 ms. It will remain low if VCC is below the reset threshold (4.65 V in ASM690A / ASM802L and 4.4 V in the ASM692A / ASM802L) and remains low for 200 ms after VCC rises above the reset threshold. − 7 RESET Active−HIGH reset output. The inverse of RESET. 8 8 VBATT Auxiliary power or backup−battery input. VBATT should be connected to GND if the function is not used. The input has about 40 mV of hysteresis to prevent rapid toggling between VCC and VBATT. |
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