DS96LV00800

P R E L I M I N A R Y

1

1

Z86L88/81/86/87/89/73

1

FEATURES

s

Low Power Consumption - 40 mW (Typical)

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Three Standby Modes

–

STOP

–

HALT

–

Low Voltage

s

Special Architecture to Automate Both Generation and

Reception of Complex Pulses or Signals:

–

One Programmable 8-Bit Counter/Timer with Two

Capture Registers

–

One Programmable 16-Bit Counter/Timer with

One 16-Bit Capture Register

–

Programmable

Input

Glitch

Filter

for

Pulse

Reception

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Five Priority Interrupts

–

Three External

–

Two Assigned to Counter/Timers

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Low Voltage Detection and Standby Mode

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Programmable Watch-Dog/Power-On Reset Circuits

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Two Independent Comparators with Programmable

Interrupt Polarity

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On-Chip Oscillator that Accepts a Crystal, Ceramic

Resonator, LC, RC (Mask Option), or External Clock

Drive

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Mask Selectable 200 kOhms Pull-Ups on Ports 0, 2, 3

–

All Eight Port 2 Bits at One Time or Not

–

Pull-Ups Automatically Disabled Upon Selecting

Individual Pins as Outputs.

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Maskable Mouse/Trackball Interface on P00 Through

P03.

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32 kHz Oscillator Mask Option

GENERAL DESCRIPTION

troller Processor) Controllers are ROM/ROMless-based

256 bytes of internal RAM. The differentiating factor be-

tween these devices is the availability of ROM, and pack-

age options. For the 40 and 44-pin devices the use of ex-

ternal memory enables these Z8 microcontrollers to be

used where code flexibility is required. Zilog’s CMOS mi-

crocontrollers offers fast executing, efficient use of memo-

ry, sophisticated interrupts, input/output bit manipulation

capabilities, automated pulse generation/reception, and in-

ternal key-scan pull-up resistors. The Z86LXX product line

offers easy hardware/software system expansion cost-ef-

fective and low power consumption.

The Z86LXX architecture is based on Zilog's 8-bit micro-

controller core with an Expanded Register File to allow ac-

cess to register mapped peripherals, I/O circuits, and pow-

erful counter/timer circuitry. The CCP offers a flexible I/O

scheme, an efficient register and address space structure,

and a number of ancillary features that are useful in many

Device

ROM

(KB)

RAM*

(Bytes)

I/O

Lines

Voltage

Range

Z86L88

16

237

23

2.0V to 3.9V

Z86L81

24

237

23

2.0V to 3.9V

Z86L86

32

237

23

2.0V to 3.9V

Z86L87

16

236

31

2.0V to 3.9V

Z86L89

24

236

31

2.0V to 3.9V

Z86L73

32

236

31

2.0V to 3.9V

Note: *General-Purpose