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GRM155R71C103KA01D Datasheet(PDF) 5 Page - Integrated Device Technology

Part # GRM155R71C103KA01D
Description  6-bit Digital Step Attenuator
Download  17 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

GRM155R71C103KA01D Datasheet(HTML) 5 Page - Integrated Device Technology

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6-bit Digital Step Attenuator
400 to 4000 MHz IDTF1953
Glitch-Free
TM Digital Step Attenuator
5
Rev2 April2014
F1953
DATASHEET
PARALLEL CONTROL MODE
The user has the option of running in one of two parallel modes: Direct Parallel Mode or Latched Parallel
Mode.
DIRECT-PARALLEL MODE:
Direct-parallel mode is selected when VMODE (pin 13) is < VIL and LE (pin 5) is > VIH. In this mode the
device will immediately react to any voltage changes to the parallel control pins [pins 1, 15, 16, 17, 19, 20].
Use direct-parallel mode for the fastest settling time.
LATCHED-PARALLEL MODE:
Latched-parallel mode is selected when VMODE (pin 13) is < VIL and LE (pin 5) is toggled from < VIL to > VIH
To utilize latched-parallel mode:
Set LE < VIL
Adjust pins [1, 15, 16, 17, 19, 20] to the desired attenuation setting. (Note the device will not react
to these pins while LE < VIL.)
Pull LE > VIH. The device will then transition to the attenuation settings reflected by these pins.
When the device is powered up In Latched Parallel Mode [VMODE < VIL and LE < VIL], the attenuation setting
defaults to the state defined by the six parallel data pins [pins 1, 15, 16, 17, 19, 20]
LATCHED PARALLEL MODE TIMING DIAGRAM: (Note the Timing Spec Intervals in Blue)
LATCHED PARALLEL MODE TIMING TABLE:
Interval
Symbol
Description
Min
Spec
Max
Spec
Units
A
Serial to Parallel Mode Setup Time
100
nsec
B
Parallel Data Hold Time
10
nsec
C
LE minimum pulse width
10
nsec
D
Parallel Data Setup Time
10
nsec
D[5:0]
Data Word
Latched into
Active Register
LE
VMODE
Spec
Interval
s
A
D
C
B


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