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LMP8480MMX-T Datasheet(PDF) 5 Page - Texas Instruments |
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LMP8480MMX-T Datasheet(HTML) 5 Page - Texas Instruments |
5 / 29 page LMP8480, LMP8481 www.ti.com SNVS829C – MARCH 1999 – REVISED SEPTEMBER 2015 7.5 Electrical Characteristics Unless otherwise specified, all limits specified for at TA = 25°C, VCC = 4.5 V to 76 V, 4.5V VCM 76 V, RL = 100 k, VSENSE = (VRSP – VRSN) = 0 V. (1) PARAMETER TEST CONDITIONS MIN(2) TYP(3) MAX(2) UNIT VCC = VRSP = 48 TA = 25°C ±80 ±265 V, VOS Input Offset Voltage (RTI) µV –40°C ≤ TA ≤ 125°C ±900 ΔV = 100 mV TCVOS Input Offset Voltage Drift(4) ±6 µV°C Input Bias Current(5) VCC = VRSP = 76 V, Per Input 6.3 IB μA VCC = VRSP = 76 V, Per Input, –40°C ≤ TA ≤ 12 125°C Input Leakage Current VCC = 0, VRSP = 86 V, Both inputs together 0.01 ILEAK μA VCC = 0, VRSP = 86 V, Both inputs together, 2 –40°C ≤ TA ≤ 125°C -T Version, –40°C ≤ TA ≤ 667 125°C -F Version, –40°C ≤ TA ≤ 267 125°C VSENSE(MA Differential Input Voltage Across VCC = 16 mV X) Sense Resistor(6) -S Version, –40°C ≤ TA ≤ 222 125°C -H Version, –40°C ≤ TA ≤ 133 125°C -T Version 20 -T Version, –40°C ≤ TA ≤ 125°C 19.8 20.2 -S Version 60 AV Gain V/V -S Version, –40°C ≤ TA ≤ 125°C 59.5 60.5 -H Version 100 -H Version, –40°C ≤ TA ≤ 125°C 99.2 100.8 TA = 25°C ±0.6% VCC = VRSP = 48 Gain Error V –40°C ≤ TA ≤ 125°C ±0.8% VRSP = 48 V, VCC = 4.5 to 76 V 122 DC PSRR DC Power Supply Rejection Ratio dB VRSP = 48 V, VCC = 4.5 to 76 V, –40°C ≤ TA 100 ≤ 125°C VCC = 48 V, VRSP = 4.5 to 76 V 124 dB VCC = 48 V, VRSP = 4.5 to 76 V, –40°C ≤ TA DC CMRR DC Common Mode Rejection Ratio 100 ≤ 125°C VCC = 48 V, VRSP = 4 to 76 V 124 dB Input Common Mode Voltage CMVR CMRR > 100 dB, –40°C ≤ TA ≤ 125°C 4 76 V Range Output Resistance / Load ROUT VSENSE = 100 mV 0.1 Regulation Maximum Output Voltage VCC = 4.5 V, VRSP = 48 V, VSENSE = +1 V, (Headroom) VOMAX 230 500 mV IOUT (sourcing) 500 μA (VOMAX = VCC – VOUT) (1) Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device such that TJ = TA. No specification of parametric performance is indicated in the electrical tables under conditions of internal self-heating where TJ > TA. (2) All limits are specified by testing, design, or statistical analysis. (3) Typical values represent the most likely parametric norm at the time of characterization. Actual typical values may vary over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped production material. (4) Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature change. (5) Positive Bias Current corresponds to current flowing into the device. (6) This parameter is specified by design and/or characterization and is not tested in production. Copyright © 1999–2015, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: LMP8480 LMP8481 |
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