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TLV320AIC3107IYZFT Datasheet(PDF) 11 Page - Texas Instruments |
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TLV320AIC3107IYZFT Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 102 page  TLV320AIC3107 www.ti.com SLOS545D – NOVEMBER 2008 – REVISED DECEMBER 2014 Electrical Characteristics (continued) At 25°C, AVDD_DAC = 3.3 V, DRVDD = 3.3 V, SPVDD = 5 V, IOVDD = 3.3 V, DVDD = 1.8 V, Fs = 48-kHz, 16-bit audio data (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT POWER CONSUMPTION, DRVDD, AVDD_DAC = 3.3 V, SPVDD = 5V, DVDD = 1.8 V, IOVDD = 3.3 V IDRVDD+IAVDD_DAC 0.1 RESET Held low μA IDVDD 0.2 IDRVDD+IAVDD_DAC 2.1 Mono ADC record, Fs = 8 ksps, mA I2S Slave, AGC Off, No signal IDVDD 0.5 IDRVDD+IAVDD_DAC Stereo ADC record, Fs = 8 4.1 ksps, I2S Slave, AGC Off, No mA IDVDD 0.6 signal IDRVDD+IAVDD_DAC Stereo ADC record, Fs = 48 4.3 ksps, I2S Slave, AGC Off, No mA IDVDD 2.5 signal IDRVDD+IAVDD_DAC Stereo DAC Playback to 3.5 Lineout , Analog mixer mA bypassed Fs = 48 ksps, I2S IDVDD 2.3 Slave IDRVDD+IAVDD_DAC Stereo DAC Playback to 4.9 Lineout, Fs = 48 ksps, I2S mA IDVDD 2.3 Slave, No signal IDRVDD+IAVDD_DAC Stereo DAC Playback to stereo 6.7 single-ended headphone, Fs = mA IDVDD 2.3 48 ksps, I2S Slave, No signal IDRVDD+IAVDD_DAC 3.1 Stereo LINEIN to stereo mA LINEOUT, No signal IDVDD 0 IDRVDD+IAVDD_DAC 1.4 Extra power when PLL enabled mA IDVDD 0.9 IDRVDD+IAVDD_DAC 28 All blocks powered down, μA Headset detection enabled IDVDD 2 SPVDD class-D disabled 200 nA 8.7 Audio Data Serial Interface Timing Requirements (1) (2) IOVDD = 1.1 V IOVDD = 3.3 V UNIT MIN MAX MIN MAX I2S/LJF/RJF TIMING IN MASTER MODE, SEE Figure 1 td(WS) ADWS/WCLK delay time 50 15 ns td(DO-WS) ADWS/WCLK to DOUT delay time 50 20 ns td(DO-BCLK) BCLK to DOUT delay time 50 15 ns ts(DI) DIN setup time 10 6 ns th(DI) DIN hold time 10 6 ns tr Rise time 30 10 ns tf Fall time 30 10 ns DSP TIMING IN MASTER MODE, SEE Figure 2 td(WS) ADWS/WCLK delay time 50 15 ns td(DO-BCLK) BCLK to DOUT delay time 50 15 ns ts(DI) DIN setup time 10 6 ns th(DI) DIN hold time 10 6 ns tr Rise time 30 10 ns tf Fall time 30 10 ns (1) All timing specifications are measured at characterization but not tested at final test. (2) All specifications at 25°C, DVDD = 1.8 V Copyright © 2008–2014, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: TLV320AIC3107 |
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