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C8051F981-C-GM Datasheet(PDF) 5 Page - Silicon Laboratories |
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C8051F981-C-GM Datasheet(HTML) 5 Page - Silicon Laboratories |
5 / 325 page Rev. 1.2 5 C8051F99x-C8051F98x 19.2.Low Power Internal Oscillator......................................................................... 189 19.3.External Oscillator Drive Circuit...................................................................... 189 19.3.1.External Crystal Mode............................................................................ 189 19.3.2.External RC Mode.................................................................................. 191 19.3.3.External Capacitor Mode........................................................................ 192 19.3.4.External CMOS Clock Mode .................................................................. 192 19.4.Special Function Registers for Selecting and Configuring the System Clock 193 20. SmaRTClock (Real Time Clock) .......................................................................... 197 20.1.SmaRTClock Interface ................................................................................... 198 20.1.1.SmaRTClock Lock and Key Functions................................................... 198 20.1.2.Using RTC0ADR and RTC0DAT to Access SmaRTClock Internal Registers ..................................................................................................... 199 20.1.3.RTC0ADR Short Strobe Feature............................................................ 199 20.1.4.SmaRTClock Interface Autoread Feature .............................................. 199 20.1.5.RTC0ADR Autoincrement Feature......................................................... 200 20.2.SmaRTClock Clocking Sources ..................................................................... 203 20.2.1.Using the SmaRTClock Oscillator with a Crystal or External CMOS Clock ..................................................................................................... 203 20.2.2.Using the SmaRTClock Oscillator in Self-Oscillate Mode...................... 204 20.2.3.Using the Low Frequency Oscillator (LFO) ............................................ 204 20.2.4.Programmable Load Capacitance.......................................................... 205 20.2.5.Automatic Gain Control (Crystal Mode Only) and SmaRTClock Bias Dou- bling ..................................................................................................... 206 20.2.6.Missing SmaRTClock Detector .............................................................. 208 20.2.7.SmaRTClock Oscillator Crystal Valid Detector ...................................... 208 20.3.SmaRTClock Timer and Alarm Function ........................................................ 208 20.3.1.Setting and Reading the SmaRTClock Timer Value .............................. 208 20.3.2.Setting a SmaRTClock Alarm ................................................................ 209 20.3.3.Software Considerations for using the SmaRTClock Timer and Alarm . 210 21. Port Input/Output.................................................................................................. 215 21.1.Port I/O Modes of Operation........................................................................... 216 21.1.1.Port Pins Configured for Analog I/O....................................................... 216 21.1.2.Port Pins Configured For Digital I/O....................................................... 216 21.1.3.Interfacing Port I/O to 5 V Logic ............................................................. 217 21.1.4.Increasing Port I/O Drive Strength ......................................................... 217 21.2.Assigning Port I/O Pins to Analog and Digital Functions................................ 217 21.2.1.Assigning Port I/O Pins to Analog Functions ......................................... 217 21.2.2.Assigning Port I/O Pins to Digital Functions........................................... 218 21.2.3.Assigning Port I/O Pins to External Digital Event Capture Functions .... 218 21.3.Priority Crossbar Decoder .............................................................................. 219 21.4.Port Match ...................................................................................................... 225 21.5.Special Function Registers for Accessing and Configuring Port I/O .............. 227 22. SMBus ................................................................................................................... 235 22.1.Supporting Documents ................................................................................... 236 22.2.SMBus Configuration...................................................................................... 236 |
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