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C8051F986-C-GM Datasheet(PDF) 11 Page - Silicon Laboratories |
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C8051F986-C-GM Datasheet(HTML) 11 Page - Silicon Laboratories |
11 / 325 page Rev. 1.2 11 C8051F99x-C8051F98x List of Tables Table 2.1. Product Selection Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 Table 3.1. Pin Definitions for the C8051F99x-C8051F98x . . . . . . . . . . . . . . . . . . . 32 Table 3.2. QFN-20 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 Table 3.3. PCB Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 Table 3.4. QFN-24 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 Table 3.5. PCB Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 3.6. QSOP-24 Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Table 3.7. PCB Land Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 Table 4.1. Absolute Maximum Ratings .................................................................... 48 Table 4.2. Global Electrical Characteristics ............................................................. 49 Table 4.3. Port I/O DC Electrical Characteristics ..................................................... 54 Table 4.4. Reset Electrical Characteristics .............................................................. 57 Table 4.5. Power Management Electrical Specifications ......................................... 58 Table 4.6. Flash Electrical Characteristics .............................................................. 58 Table 4.7. Internal Precision Oscillator Electrical Characteristics ........................... 58 Table 4.8. Internal Low-Power Oscillator Electrical Characteristics ........................ 58 Table 4.9. SmaRTClock Characteristics .................................................................. 59 Table 4.10. ADC0 Electrical Characteristics ............................................................ 59 Table 4.11. Temperature Sensor Electrical Characteristics .................................... 60 Table 4.12. Voltage Reference Electrical Characteristics ....................................... 61 Table 4.13. IREF0 Electrical Characteristics ........................................................... 62 Table 4.14. Comparator Electrical Characteristics .................................................. 63 Table 4.15. VREG0 Electrical Characteristics ......................................................... 64 Table 4.16. Capacitive Sense Electrical Characteristics ......................................... 65 Table 5.1. Representative Conversion Times and Energy Consumption for the SAR ADC with 1.65 V High-Speed VREF . . . . . . . . . . . . . . . . . . . . . . . . . . 73 Table 8.1. Operation with Auto-scan and Accumulate . . . . . . . . . . . . . . . . . . . . . 105 Table 9.1. CIP-51 Instruction Set Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Table 12.1. Special Function Register (SFR) Memory Map (Page 0x0) . . . . . . . . 132 Table 12.2. Special Function Register (SFR) Memory Map (Page 0xF) . . . . . . . . 133 Table 12.3. Special Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134 Table 13.1. Interrupt Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140 Table 14.1. Flash Security Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 153 Table 15.1. Power Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162 Table 16.1. Example 16-bit CRC Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173 Table 19.1. Recommended XFCN Settings for Crystal Mode . . . . . . . . . . . . . . . . 190 Table 19.2. Recommended XFCN Settings for RC and C modes . . . . . . . . . . . . . 191 Table 20.1. SmaRTClock Internal Registers ......................................................... 198 Table 20.2. SmaRTClock Load Capacitance Settings . . . . . . . . . . . . . . . . . . . . . 205 Table 20.3. SmaRTClock Bias Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 207 Table 21.1. Port I/O Assignment for Analog Functions . . . . . . . . . . . . . . . . . . . . . 217 Table 21.2. Port I/O Assignment for Digital Functions . . . . . . . . . . . . . . . . . . . . . . 218 Table 21.3. Port I/O Assignment for External Digital Event Capture Functions . . 218 |
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