TPA2011D1

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SLOS626B – DECEMBER 2009 – REVISED NOVEMBER 2015

7.2 ESD Ratings

VALUE

UNIT

±2000

Electrostatic discharge

V

Charged-device model (CDM), per JEDEC specification JESD22-

±1000

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

7.3 Recommended Operating Conditions

MIN

MAX

UNIT

Class-D supply voltage

2.5

5.5

V

High-level input voltage

EN

1.3

V

Low-level input voltage

EN

0.35

V

Input resistor

Gain

≤ 20 V/V (26 dB)

15

k

Ω

Common mode input voltage range

0.75

V

Operating free-air temperature

–40

85

°C

7.4 Thermal Information

TPA2011D1

YFF (DSBGA)

UNIT

9 PINS

Junction-to-ambient thermal resistance

107

°C/W

Junction-to-case (top) thermal resistance

0.9

°C/W

Junction-to-board thermal resistance

18.1

°C/W

Junction-to-top characterization parameter

3.8

°C/W

Junction-to-board characterization parameter

18

°C/W

Junction-to-case (bottom) thermal resistance

N/A

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

7.5 Electrical Characteristics

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output offset voltage (measured

1

5

mV

differentially)

High-level input current

50

μA

Low-level input current

1

μA

1.8

2.5

Quiescent current

1.5

2.3

mA

1.3

2.1

Shutdown current

0.1

2

μA

Output impedance in shutdown mode

2

k

Ω

Switching frequency

250

300

350

kHz

Gain

V/V

Resistance from EN to GND

300

k

Ω

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