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54ACQ373D Datasheet(PDF) 1 Page - National Semiconductor (TI) |
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54ACQ373D Datasheet(HTML) 1 Page - National Semiconductor (TI) |
1 / 8 page 54ACQ373 • 54ACTQ373 Quiet Series Octal Transparent Latch with TRI-STATE® Outputs General Description The ’ACQ/’ACTQ373 consists of eight latches with TRI-STATE outputs for bus organized system applications. The latches appear transparent to the data when Latch En- able (LE) is HIGH. When LE is low, the data satisfying the in- put timing requirements is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the bus output is in the high impedance state. The ’ACQ/’ACTQ373 utilizes NSC Quiet Series technology to guarantee quiet output switching and improve dynamic threshold performance. FACT Quiet Series™ features GTO™ output control and undershoot corrector in addition to a split ground bus for superior performance. Features n ICC and IOZ reduced by 50% n Guaranteed simultaneous switching noise level and dynamic threshold performance n Improved latch up immunity n Eight latches in a single package n TRI-STATE outputs drive bus lines or buffer memory address registers n Outputs source/sink 24 mA n Faster prop delays than the standard ’AC/’ACT373 n 4 kV minimum ESD immunity (’ACQ) n Standard Military Drawing (SMD) — ’ACTQ373: 5962-92188 — ’ACQ373: 5962-92178 Logic Symbols Pin Names Description D 0–D7 Data Inputs LE Latch Enable Input OE Output Enable Input O 0–O7 TRI-STATE Latch Outputs GTO™ is a trademark of National Semiconductor Corporation. TRI-STATE® is a registered trademark of National Semiconductor Corporation. FACT® is a registered trademark of Fairchild Semiconductor Corporation. FACT Quiet Series™ is a trademark of Fairchild Semiconductor Corporation. DS100238-1 IEEE/IEC DS100238-2 September 1998 © 1998 National Semiconductor Corporation DS100238 www.national.com |
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