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CP2114 Datasheet(PDF) 7 Page - Silicon Laboratories |
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CP2114 Datasheet(HTML) 7 Page - Silicon Laboratories |
7 / 44 page CP2114 Rev. 1.1 7 Table 5. GPIO Output Specifications –40 to +85 °C unless otherwise specified. Parameter Test Condition Min Typ Max Unit GPIO.9 Clock Output fOUT x 0.985 fOUT fOUT x 1.015 Hz TX Toggle Rate — 20 — Hz RX Toggle Rate — 20 — Hz Table 6. One Time Programming Specifications VDD = 3.3 to 3.6 V, –40 to +85 °C unless otherwise specified. Parameter Test Condition Min Typ Max Unit Digital Port I/O Supply Voltage (VIO) during programming 3.3 VDD V Voltage on VPP with respect to GND during a programming operation VIO > 3.3 V 5.75 — VIO + 3.6 V Capacitor on VPP for programming — 4.7 — µF Table 7. System Clock Specifications VDD = 3.3 to 3.6 V, –40 to +85 °C unless otherwise specified. Parameter Test Condition Min Typ Max Unit Internal Oscillator SF = 0 (Register: System_Props, bit: 1) SF = 1 (Register: System_Props, bit: 1) — — 48 49.152 — — MHz MHz External CMOS clock input frequency SF = 0 (Register: System_Props, bit: 1) SF = 1 (Register: System_Props, bit: 1) 47.880 — 48 49.152 48.120 — MHz MHz 1. Depending on the requirements of the external DAC, the system clock frequency will be either 48.0 or 49.152 MHz. See Section 5.6 for more information. 2. The USB specification requires a clock accuracy of ±0.25%. |
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