Rev. 1.1 6/15

Copyright © 2015 by Silicon Laboratories

Si535/536

Si535/536

Features

Applications

Description

provide an ultra low jitter clock at high-speed differential frequencies. Unlike a

traditional XO, where a different crystal is required for each output frequency,

the Si535/536 uses one fixed crystal to provide a wide range of output

frequencies. This IC based approach allows the crystal resonator to provide

exceptional frequency stability and reliability. In addition, DSPLL clock

synthesis provides superior supply noise rejection, simplifying the task of

generating low jitter clocks in noisy environments typically found in

communication systems. The Si535/536 IC based XO is factory programmed

at time of shipment, thereby eliminating long lead times associated with

custom oscillators.

Functional Block Diagram

100 MHz to 312.5 MHz

jitter performance and high-power

supply noise rejection

SAW-based oscillators

LVDS outputs

package and pinout

Fixed

Frequency

XO

100–312.5 MHz

Clock Synthesis

CLK+

CLK–

OE

GND

Ordering Information:

See page 7.

Pin Assignments:

See page 6.

(Top View)

Si5602

1

2

3

6

5

4

GND

OE

CLK+

CLK–

NC

1

2

3

6

5

4

GND

NC

CLK+

CLK–

OE

Si535

Si536