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LMX2487 Datasheet(PDF) 31 Page - Texas Instruments

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Part # LMX2487
Description  Low-Power Dual PLLatinum Frequency Synthesizers
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

LMX2487 Datasheet(HTML) 31 Page - Texas Instruments

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LMX2487
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SNAS322C – FEBRUARY 2006 – REVISED JANUARY 2016
8.6.4.1 IF_R[11:0] – IF R Divider Value
For the IF R divider, the R value is determined by the IF_R[11:0] bits in the R3 register. The minimum value for
IF_R is 3.
Table 24. IF PLL R Divider
R
IF_R[11:0]
VALUE
3
0
0
0
0
0
0
0
0
0
0
1
1
...
.
.
.
.
.
.
.
.
.
.
.
.
4095
1
1
1
1
1
1
1
1
1
1
1
1
8.6.4.2 RF_CPG – RF PLL Charge Pump Gain
This is used to control the magnitude of the RF PLL charge pump in steady-state operation.
Table 25. RF PLL Charge Pump Gain
TYPICAL RF CHARGE PUMP CURRENT
RF_CPG
CHARGE PUMP STATE
AT 3 V (µA)
0
1X
95
1
2X
190
2
3X
285
3
4X
380
4
5X
475
5
6X
570
6
7X
665
7
8X
760
8
9X
855
9
10X
950
10
11X
1045
11
12X
1140
12
13X
1235
13
14X
1330
14
15X
1425
15
16X
1520
8.6.4.3 Access – Register Access word
It is mandatory that the first 5 registers R0-R4 be programmed. The programming of registers R5-R7 is optional.
The ACCESS[3:0] bits determine which additional registers need to be programmed. Any one of these registers
can be individually programmed. According to Table 26, when the state of a register is in default mode, all the
bits in that register are forced to a default state and it is not necessary to program this register. When the register
is programmable, it needs to be programmed through the MICROWIRE. Using this register access technique, the
programming required is reduced up to 37%.
Table 26. Access word
ACCESS BIT
REGISTER LOCATION
REGISTER CONTROLLED
ACCESS[0]
R3[20]
Must be set to 1
ACCESS[1]
R3[21]
R5
ACCESS[2]
R3[22]
R6
ACCESS[3]
R3[23]
R7
Copyright © 2006–2016, Texas Instruments Incorporated
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