ADP2230ACPZ-1833R7 datasheet(5/18 Pages) AD

Part #	ADP2230ACPZ-1833R7

Description	Dual 2 MHz, 800 mA, Synchronous, Low Quiescent Current Buck Regulator

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5 / 18 page

Data Sheet

ADP2230

Rev. A | Page 5 of 18

ABSOLUTE MAXIMUM RATINGS

Table 3.

Parameter

Rating

VINx, FBx, EN2, SYNC to AGND, PGND

−0.3 V to +7 V

EN1

−0.3 V to +6 V

SWx to AGND, PGND

−0.3 V to VINx

Operating Ambient Temperature Range

−40°C to +85°C

Operating Junction Temperature Range

−40°C to +125°C

Storage Temperature Range

−65°C to +150°C

Soldering Conditions

JEDEC J-STD-020

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

Absolute maximum ratings apply individually only, not in

combination.

THERMAL DATA

Exceeding the junction temperature (TJ) limit can cause damage

to the ADP2230. Monitoring ambient temperature does not

guarantee that TJ is within the specified temperature limits. The

maximum ambient temperature may require derating in

applications with high power dissipation and poor thermal

resistance.

In applications with moderate power dissipation and low

printed circuit board (PCB) thermal resistance, the maximum

ambient temperature can exceed the maximum limit as long as

the junction temperature is within specification limits. The

junction temperature of the device is dependent on the ambient

temperature, the power dissipation of the device, and the

junction-to-ambient thermal resistance (θJA) of the package.

Maximum TJ is calculated from the ambient temperature (TA)

and power dissipation (PD) using the formula

TJ = TA + (PD × θJA)

(1)

θJA of the package is based on modeling and calculation using a

4-layer board. θJA is highly dependent on the application and

board layout. In applications where high maximum power

dissipation exists, close attention to thermal board design is

required. The value of θJA can vary, depending on PCB material,

layout, and environmental conditions.

The specified values of θJA are based on a 4-layer, 4 in. × 3 in.

circuit board. See JEDEC JESD51-7, High Effective Thermal

Conductivity Test Board for Leaded Surface Mount Packages, for

detailed information on board construction. For more

information, see AN-772 Application Note, A Design and

Manufacturing Guide for the Lead Frame Chip Scale Package

(LFCSP).

ΨJB is the junction-to-board thermal characterization parameter

with units of °C/W. The ΨJB of the package is based on modeling

and calculation using a 4-layer board. The JESD51-12,

Guidelines for Reporting and Using Electronic Package Thermal

Information, states that thermal characterization parameters are

not the same as thermal resistances. ΨJB measures the

component power flowing through multiple thermal paths

rather than a single path as in junction-to-board thermal

resistance (θJB). Therefore, ΨJB thermal paths include convection

from the top of the package as well as radiation from the

package, factors that make ΨJB more useful in real-world

applications. Maximum TJ is calculated from the board

temperature (TB) and PD using the formula

TJ = TB + (PD × ΨJB)

(2)

For more information regarding ΨJB, see JESD51-12 and

JESD51-8, Integrated Circuit Thermal Test Method

Environmental Conditions—Junction-to-Board.

THERMAL RESISTANCE

θJA and ΨJB are specified for the worst-case conditions, that is,

a device soldered in a circuit board for surface-mount packages.

θJC is a parameter for surface-mount packages with top mounted

heat sinks.

Table 4. Thermal Resistance

Package Type

θJA

θJC

Unit

10-Lead, 3 mm × 3mm LFCSP

44.6

5.45

°C/W

ESD CAUTION

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