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CDCP1803RTHT Datasheet(PDF) 2 Page - Texas Instruments |
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CDCP1803RTHT Datasheet(HTML) 2 Page - Texas Instruments |
2 / 25 page Control VBB LVPECL Y1 Y1 LVPECL Y2 Y2 LVPECL Y0 Y0 Div 1 Div 2 Div 4 Div 8 Div 16 Bias Generator VDD − 1.3 V (Imax < 1.5 mA) IN IN S2 EN S0 S1 B0059-02 CDCP1803 SCAS727F – NOVEMBER 2003 – REVISED DECEMBER 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. FUNCTIONAL BLOCK DIAGRAM 2 Submit Documentation Feedback Copyright © 2003–2013, Texas Instruments Incorporated Product Folder Links :CDCP1803 |
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